From: lkcl <lkcl@web>
Date: Thu, 9 Jun 2022 16:45:38 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1887
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=95d4395db1e9ff9ecb1a1f8312230d2923f1c520;p=libreriscv.git

---

diff --git a/openpower/sv/compliancy_levels.mdwn b/openpower/sv/compliancy_levels.mdwn
index ef64f1755..0c2424731 100644
--- a/openpower/sv/compliancy_levels.mdwn
+++ b/openpower/sv/compliancy_levels.mdwn
@@ -121,7 +121,8 @@ to 64-bit.
 This level is best suited to high-performance power-efficient but
 specialist Compute workloads.  128 GPRs, FPRs and CR Fields are all
 required, as is element-width overrides to allow data processing
-down to the 8-bit level.
+down to the 8-bit level.  SUBVL support (Sub-Vector vec2/3/4) is also
+required.
 
 All SVP64 Modes are required to be implemented in hardware: Saturation
 in particular is a necessity for Audio DSP work. Reduction as well to