From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 24 Sep 2018 02:03:58 +0000 (+0100)
Subject: add function identifying the registers in each emulated instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=95fc8e9fb9535296cc674ec2744877d7c360c044;p=riscv-isa-sim.git

add function identifying the registers in each emulated instruction
---

diff --git a/id_regs.py b/id_regs.py
index c6c34ff..d74f088 100644
--- a/id_regs.py
+++ b/id_regs.py
@@ -24,7 +24,25 @@ def list_insns():
         res.append(os.path.join(insns_dir, fname))
     return res
 
+patterns = ['WRITE_RD', 'RS1', 'RS2', 'RS3',
+            'WRITE_FRD', 'FRS1', 'FRS2', 'FRS3']
+
+def find_registers(fname):
+    res = []
+    with open(fname) as f:
+        f = f.read()
+        for pattern in patterns:
+            x = f.find(pattern)
+            if x == -1:
+                continue
+            if pattern.startswith('R') and x != 0 and f[x-1] == 'F':
+                # botch-job/hack: RS1 also matches against FRS1 (etc.)
+                # check letter before match: if "F", skip it.
+                continue
+            res.append('REG_%s' % pattern)
+    return ' | '.join(res)
+
 if __name__ == '__main__':
     files = list_insns()
-    for f in files:
-        print f
+    for fname in files:
+        print fname, find_registers(fname)