From: lkcl <lkcl@web>
Date: Sun, 24 Jan 2021 11:06:55 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~363
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=960adef5381e345d9ec219d0ec6640c21a583ff0;p=libreriscv.git

---

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index df5a14c31..5cc0eec15 100644
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -35,7 +35,7 @@ These are prerequisite tasks:
 * power-gem5 automanagement, similar to pygdbmi for starting qemu
   - found this <https://www.gem5.org/documentation/general_docs/debugging_and_testing/debugging/debugging_simulated_code>
   just use pygdbmi
-  - needs remote gdb first https://github.com/gem5/gem5/blob/stable/src/arch/riscv/remote_gdb.cc
+  - remote gdb should work <https://github.com/power-gem5/gem5/blob/gem5-experimental/src/arch/power/remote_gdb.cc>
 * c++, c and python macros for generating [[sv/svp64]] assembler
   (svp64 prefixes)
   - python svp64 underway, minimalist sufficient for FU unit tests