From: Eric Anholt <eric@anholt.net>
Date: Fri, 18 Dec 2015 19:41:38 +0000 (-0800)
Subject: vc4: Keep sample mask writes from being reordered after TLB writes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=960f48809ffebca14af27ce9e87eabc04dfe9b84;p=mesa.git

vc4: Keep sample mask writes from being reordered after TLB writes

Fixes a regression I noticed after introducing scheduling on the QIR.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
---

diff --git a/src/gallium/drivers/vc4/vc4_qpu_schedule.c b/src/gallium/drivers/vc4/vc4_qpu_schedule.c
index 98b7b6070d7..76cad2e03fe 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_schedule.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_schedule.c
@@ -259,7 +259,8 @@ process_waddr_deps(struct schedule_state *state, struct schedule_node *n,
                 }
         } else if (is_tmu_write(waddr)) {
                 add_write_dep(state, &state->last_tmu_write, n);
-        } else if (qpu_waddr_is_tlb(waddr)) {
+        } else if (qpu_waddr_is_tlb(waddr) ||
+                   waddr == QPU_W_MS_FLAGS) {
                 add_write_dep(state, &state->last_tlb, n);
         } else {
                 switch (waddr) {