From: Stephen Twigg Date: Thu, 3 Apr 2014 23:52:34 +0000 (-0700) Subject: Add ut_fclass_s/d hwacha (unused until encoding sync) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=963c0825a720fadd3de03df18d772a2f5a54a65a;p=riscv-isa-sim.git Add ut_fclass_s/d hwacha (unused until encoding sync) --- diff --git a/hwacha/insns_ut/ut_fclass_d.h b/hwacha/insns_ut/ut_fclass_d.h new file mode 120000 index 0000000..b3fea7f --- /dev/null +++ b/hwacha/insns_ut/ut_fclass_d.h @@ -0,0 +1 @@ +../../riscv/insns/fclass_d.h \ No newline at end of file diff --git a/hwacha/insns_ut/ut_fclass_s.h b/hwacha/insns_ut/ut_fclass_s.h new file mode 120000 index 0000000..7df8a5a --- /dev/null +++ b/hwacha/insns_ut/ut_fclass_s.h @@ -0,0 +1 @@ +../../riscv/insns/fclass_s.h \ No newline at end of file