From: Zachary Snow Date: Thu, 23 Sep 2021 17:33:55 +0000 (-0400) Subject: Fix TOK_ID memory leak in for_initialization X-Git-Tag: yosys-0.10~2^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9658d2e337a54fc06873de716d0ae5586ffd869b;p=yosys.git Fix TOK_ID memory leak in for_initialization --- diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 8d0ba4cf6..acb8b996c 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2674,6 +2674,7 @@ for_initialization: AstNode *node = new AstNode(AST_ASSIGN_EQ, ident, $3); ast_stack.back()->children.push_back(node); SET_AST_NODE_LOC(node, @1, @3); + delete $1; } | non_io_wire_type range TOK_ID { frontend_verilog_yyerror("For loop variable declaration is missing initialization!");