From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 10 Mar 2019 03:37:36 +0000 (+0000)
Subject: allow code-creation
X-Git-Tag: ls180-24jan2020~1702
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9678f15f0c77d58649d1064e5d7268905da16937;p=ieee754fpu.git

allow code-creation
---

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index d37de7ae..0ca1a05e 100644
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -1493,10 +1493,10 @@ class FPADD(FPID):
 if __name__ == "__main__":
     if True:
         alu = FPADD(width=32, id_wid=5, single_cycle=True)
-        main(alu, ports=alu.in_a.ports() + \
-                        alu.in_b.ports() + \
-                        alu.out_z.ports() + \
-                        [alu.in_mid, alu.out_mid])
+        main(alu, ports=alu.rs[0][0].ports() + \
+                        alu.rs[0][1].ports() + \
+                        alu.rs[0][2].ports() + \
+                        [alu.ids.in_mid, alu.ids.out_mid])
     else:
         alu = FPADDBase(width=32, id_wid=5, single_cycle=True)
         main(alu, ports=[alu.in_a, alu.in_b] + \