From: lkcl <lkcl@web>
Date: Thu, 11 Jun 2020 05:11:29 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2482
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=96bb360b5b2de83f6913a156317014fcb3fa6e05;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/memory_and_cache.mdwn b/3d_gpu/architecture/memory_and_cache.mdwn
index a9f0910f9..e3ad496b5 100644
--- a/3d_gpu/architecture/memory_and_cache.mdwn
+++ b/3d_gpu/architecture/memory_and_cache.mdwn
@@ -39,7 +39,7 @@ Basic diagram:
   [Enjoy-Digital Litex](https://github.com/enjoy-digital/litex)
   code takes over, and connect to peripherals and testing infrastructure.
 
-* Memory is the silicon-proven OpenCores [SDRAM|sdram] interface,
+* Memory is the silicon-proven OpenCores [[SDRAM|sdram]] interface,
   and it is Wishbone compliant.
 
 ## Memory Interface Required by LDSTComputationalUnit