From: Dominik Vogt <vogt@linux.vnet.ibm.com>
Date: Tue, 25 Apr 2017 07:33:05 +0000 (+0000)
Subject: S/390: Load and test peephole.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=97160c9b3b6e524efd7ee4e12dfcd82519d27246;p=gcc.git

S/390: Load and test peephole.

gcc/ChangeLog:

2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* config/s390/s390.md (define_peephole2): New peephole to help
	combining the load-and-test pattern with volatile memory.

From-SVN: r247131
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2f2365b0b18..7106442a8c4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+	* config/s390/s390.md (define_peephole2): New peephole to help
+	combining the load-and-test pattern with volatile memory.
+
 2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
 	* config/s390/s390.md ("cstorecc4"): Use load-on-condition and deal
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 6a1cab6947a..9baafccdf5a 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -907,6 +907,21 @@
   [(set_attr "op_type" "RR<E>,RXY")
    (set_attr "z10prop" "z10_fr_E1,z10_fwd_A3") ])
 
+; Peephole to combine a load-and-test from volatile memory which combine does
+; not do.
+(define_peephole2
+  [(set (match_operand:GPR 0 "register_operand")
+	(match_operand:GPR 2 "memory_operand"))
+   (set (reg CC_REGNUM)
+	(compare (match_dup 0) (match_operand:GPR 1 "const0_operand")))]
+  "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM
+   && GENERAL_REG_P (operands[0])
+   && satisfies_constraint_T (operands[2])"
+  [(parallel
+    [(set (reg:CCS CC_REGNUM)
+	  (compare:CCS (match_dup 2) (match_dup 1)))
+     (set (match_dup 0) (match_dup 2))])])
+
 ; ltr, lt, ltgr, ltg
 (define_insn "*tst<mode>_cconly_extimm"
   [(set (reg CC_REGNUM)