From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 23 Mar 2016 07:56:08 +0000 (+0100)
Subject: Fixed handling of inverters (aka 1-input luts) in nlutmap
X-Git-Tag: yosys-0.7~291
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9717495401e58a3d0a41113b541442227daa7cc3;p=yosys.git

Fixed handling of inverters (aka 1-input luts) in nlutmap
---

diff --git a/passes/techmap/nlutmap.cc b/passes/techmap/nlutmap.cc
index 7ece40059..f5e77722e 100644
--- a/passes/techmap/nlutmap.cc
+++ b/passes/techmap/nlutmap.cc
@@ -64,7 +64,7 @@ struct NlutmapWorker
 	{
 		vector<int> available_luts = config.luts;
 
-		while (!available_luts.empty())
+		while (GetSize(available_luts) > 1)
 		{
 			int n_luts = available_luts.back();
 			int lut_size = GetSize(available_luts);
@@ -84,7 +84,7 @@ struct NlutmapWorker
 				if (cell->type != "$lut" || mapped_cells.count(cell))
 					continue;
 
-				if (GetSize(cell->getPort("\\A")) == lut_size)
+				if (GetSize(cell->getPort("\\A")) == lut_size || lut_size == 2)
 					candidate_ratings[cell] = 0;
 
 				for (auto &conn : cell->connections())