From: James Greenhalgh Date: Mon, 16 Nov 2015 17:41:10 +0000 (+0000) Subject: [Patch ARM] Add support for Cortex-A35 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=971f13d7456bf53cd860edb45d99a6657ae5216b;p=gcc.git [Patch ARM] Add support for Cortex-A35 gcc/ * config/arm/arm-cores.def (cortex-a35): New. * config/arm/arm.c (arm_cortex_a35_tune): New. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-a35. * config/arm/t-aprofile: Likewise. * doc/invoke.texi (-mcpu): Likewise. From-SVN: r230431 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 59a6d2f834a..fa6dcd51d15 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2015-11-16 James Greenhalgh + + * config/arm/arm-cores.def (cortex-a35): New. + * config/arm/arm.c (arm_cortex_a35_tune): New. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-a35. + * config/arm/t-aprofile: Likewise. + * doc/invoke.texi (-mcpu): Likewise. + 2015-11-16 Jim Wilson * config/arm/t-aprofile (MULTILIB_MATCHES): Add lines for exynos-m1 diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 86ed0cb1dbe..d09707b6ed0 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -165,6 +165,7 @@ ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, ARM_FSET_MAKE_ ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12) /* V8 Architecture Processors */ +ARM_CORE("cortex-a35", cortexa35, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35) ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a53) ARM_CORE("cortex-a57", cortexa57, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) ARM_CORE("cortex-a72", cortexa72, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 41bf1ff250b..48aac41c37a 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -303,6 +303,9 @@ Enum(processor_type) String(cortex-a15.cortex-a7) Value(cortexa15cortexa7) EnumValue Enum(processor_type) String(cortex-a17.cortex-a7) Value(cortexa17cortexa7) +EnumValue +Enum(processor_type) String(cortex-a35) Value(cortexa35) + EnumValue Enum(processor_type) String(cortex-a53) Value(cortexa53) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index e56b5ad8cb5..1c842180cee 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -32,7 +32,7 @@ cortexr4f,cortexr5,cortexr7, cortexm7,cortexm4,cortexm3, marvell_pj4,cortexa15cortexa7,cortexa17cortexa7, - cortexa53,cortexa57,cortexa72, - exynosm1,qdf24xx,xgene1, - cortexa57cortexa53,cortexa72cortexa53" + cortexa35,cortexa53,cortexa57, + cortexa72,exynosm1,qdf24xx, + xgene1,cortexa57cortexa53,cortexa72cortexa53" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a6b25dccb01..c839f52a44f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1937,6 +1937,29 @@ const struct tune_params arm_cortex_a15_tune = tune_params::SCHED_AUTOPREF_FULL }; +const struct tune_params arm_cortex_a35_tune = +{ + arm_9e_rtx_costs, + &cortexa53_extra_costs, + NULL, /* Sched adj cost. */ + arm_default_branch_cost, + &arm_default_vec_cost, + 1, /* Constant limit. */ + 5, /* Max cond insns. */ + 8, /* Memset max inline. */ + 1, /* Issue rate. */ + ARM_PREFETCH_NOT_BENEFICIAL, + tune_params::PREF_CONST_POOL_FALSE, + tune_params::PREF_LDRD_FALSE, + tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE, /* Thumb. */ + tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE, /* ARM. */ + tune_params::DISPARAGE_FLAGS_NEITHER, + tune_params::PREF_NEON_64_FALSE, + tune_params::PREF_NEON_STRINGOPS_TRUE, + FUSE_OPS (tune_params::FUSE_MOVW_MOVT), + tune_params::SCHED_AUTOPREF_OFF +}; + const struct tune_params arm_cortex_a53_tune = { arm_9e_rtx_costs, diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index 8af460549b0..e522064441f 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -68,6 +68,7 @@ |mcpu=cortex-a15.cortex-a7 \ |mcpu=cortex-a17.cortex-a7 \ |mcpu=marvell-pj4 \ + |mcpu=cortex-a35 \ |mcpu=cortex-a53 \ |mcpu=cortex-a57 \ |mcpu=cortex-a57.cortex-a53 \ @@ -94,6 +95,7 @@ |mcpu=cortex-a12|mcpu=cortex-a17 \ |mcpu=cortex-a15.cortex-a7 \ |mcpu=cortex-a17.cortex-a7 \ + |mcpu=cortex-a35 \ |mcpu=cortex-a53 \ |mcpu=cortex-a57 \ |mcpu=cortex-a57.cortex-a53 \ diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile index 5d02ea5223d..cf3416110d4 100644 --- a/gcc/config/arm/t-aprofile +++ b/gcc/config/arm/t-aprofile @@ -86,6 +86,7 @@ MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a12 MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17 MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15.cortex-a7 MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17.cortex-a7 +MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a35 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 8057ac94549..150fbd17c09 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13566,7 +13566,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, -@samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, +@samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m7}, @samp{cortex-m4},