From: Steve Reinhardt <stever@eecs.umich.edu>
Date: Fri, 20 May 2005 21:13:37 +0000 (-0400)
Subject: Minor changes to get new cpu to compile with FULL_SYSTEM.
X-Git-Tag: m5_1.0_tutorial~57
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9725c13a0b0e444c996f27b55aa0d5e6570fab97;p=gem5.git

Minor changes to get new cpu to compile with FULL_SYSTEM.

cpu/beta_cpu/full_cpu.hh:
    Make cpu_id protected rather than private so derived
    classes can access it.
cpu/beta_cpu/regfile.hh:
    Get rid of troublesome debugging statement.

--HG--
extra : convert_revision : ae1f841697ea8d736579b8278eaf8fc6bdf3b6c5
---

diff --git a/cpu/beta_cpu/full_cpu.hh b/cpu/beta_cpu/full_cpu.hh
index a7916f9ae..42370f1e7 100644
--- a/cpu/beta_cpu/full_cpu.hh
+++ b/cpu/beta_cpu/full_cpu.hh
@@ -40,7 +40,7 @@ class BaseFullCPU : public BaseCPU
     BaseFullCPU(Params &params);
 #endif // FULL_SYSTEM
 
-  private:
+  protected:
     int cpu_id;
 };
 
diff --git a/cpu/beta_cpu/regfile.hh b/cpu/beta_cpu/regfile.hh
index d7664707d..b88a33bfb 100644
--- a/cpu/beta_cpu/regfile.hh
+++ b/cpu/beta_cpu/regfile.hh
@@ -428,11 +428,6 @@ PhysRegFile<Impl>::setIpr(int idx, uint64_t val)
         break;
 
       case ISA::IPR_IPLR:
-#ifdef DEBUG
-        if (break_ipl != -1 && break_ipl == (val & 0x1f))
-            debug_break();
-#endif
-
         // only write least significant five bits - interrupt level
         ipr[idx] = val & 0x1f;
         break;