From: Ramana Radhakrishnan <ramana@gcc.gnu.org>
Date: Tue, 27 Mar 2018 14:06:20 +0000 (+0000)
Subject: [Patch ARM] Fix PR target/81863
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=974e8240c083ce4942a7310da42e2d9260af125c;p=gcc.git

[Patch ARM] Fix PR target/81863

This has been in my patch stack for quite some time. The problem here
was that we weren't handling arm_word_relocations in
arm_valid_symbolic_address and is the surest fix for this
for GCC8 and GCC7.

Regression tested on arm-none-linux-gnueabihf . Applying to
trunk and backporting to GCC-7 in a day or so.

regards
Ramana

2018-03-27  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/81863
	* config/arm/arm.c (arm_valid_symbolic_address): Handle arm_word_relocations


2018-03-27  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/81863
	* gcc.target/arm/pr81863.c: New test.

From-SVN: r258886
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6799fdf967e..ff3afb208c5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-03-27  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR target/81863
+	* config/arm/arm.c (arm_valid_symbolic_address): Handle arm_word_relocations
+
 2018-03-27  Cesar Philippidis  <cesar@codesourcery.com>
 
 	PR target/85056
@@ -6,7 +11,7 @@
 
 2018-03-27  Richard Biener  <rguenther@suse.de>
 
-	PR middle-ed/84067
+	PR middle-end/84067
 	* match.pd ((A * C) +- (B * C) -> (A+-B) * C): Guard with
 	explicit single_use checks.
 
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b98195603e0..08120c6272b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29787,6 +29787,9 @@ arm_valid_symbolic_address_p (rtx addr)
   rtx xop0, xop1 = NULL_RTX;
   rtx tmp = addr;
 
+  if (target_word_relocations)
+    return false;
+
   if (GET_CODE (tmp) == SYMBOL_REF || GET_CODE (tmp) == LABEL_REF)
     return true;
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index dd1a7bce22d..1b566b808c7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-03-27  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR target/81863
+	* gcc.target/arm/pr81863.c: New test.
+
 2018-03-27  Cesar Philippidis  <cesar@codesourcery.com>
 
 	PR target/85056
diff --git a/gcc/testsuite/gcc.target/arm/pr81863.c b/gcc/testsuite/gcc.target/arm/pr81863.c
new file mode 100644
index 00000000000..63b1ed66b2c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr81863.c
@@ -0,0 +1,44 @@
+/* testsuite/gcc.target/arm/pr48183.c */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mword-relocations -march=armv7-a -marm" } */
+/* { dg-final { scan-assembler-not "\[\\t \]+movw" } } */
+
+int a, d, f;
+long b;
+struct ww_class {
+  int stamp;
+} c;
+struct stress {
+  int locks;
+  int nlocks;
+};
+void *e;
+int atomic_add_return_relaxed(int *p1) {
+  __builtin_prefetch(p1);
+  return a;
+}
+void atomic_long_inc_return_relaxed(int *p1) {
+  int *v = p1;
+  atomic_add_return_relaxed(v);
+}
+void ww_acquire_init(struct ww_class *p1) {
+  atomic_long_inc_return_relaxed(&p1->stamp);
+}
+void ww_mutex_lock();
+int *get_random_order();
+void stress_inorder_work() {
+  struct stress *g = e;
+  int h = g->nlocks;
+  int *i = &g->locks, *j = get_random_order();
+  do {
+    int n;
+    ww_acquire_init(&c);
+  retry:
+    for (n = 0; n < h; n++)
+      ww_mutex_lock(i[j[n]]);
+    f = n;
+    if (d)
+      goto retry;
+  } while (b);
+}
+