From: Clifford Wolf Date: Thu, 6 Mar 2014 12:08:44 +0000 (+0100) Subject: Fixed use of frozen literals in SatGen X-Git-Tag: yosys-0.3.0~86 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=97710ffad5d4750b538dac5f08b77dce37e3cda4;p=yosys.git Fixed use of frozen literals in SatGen --- diff --git a/kernel/satgen.h b/kernel/satgen.h index 3ae9502f8..bf72a31cb 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -66,13 +66,12 @@ struct SatGen if (c.wire == NULL) { RTLIL::State bit = c.data.bits.at(0); if (model_undef && dup_undef && bit == RTLIL::State::Sx) - vec.push_back(ez->literal()); + vec.push_back(ez->frozen_literal()); else vec.push_back(bit == (undef_mode ? RTLIL::State::Sx : RTLIL::State::S1) ? ez->TRUE : ez->FALSE); } else { std::string name = pf + stringf(c.wire->width == 1 ? "%s" : "%s [%d]", RTLIL::id2cstr(c.wire->name), c.offset); - vec.push_back(ez->literal(name)); - ez->freeze(vec.back()); + vec.push_back(ez->frozen_literal(name)); } return vec; }