From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 13 Feb 2020 20:13:12 +0000 (-0800)
Subject: Update simple_abc9 tests
X-Git-Tag: working-ls180~780^2~27
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=977262c8033b8778a32d4f29a77c64ea5a2799bd;p=yosys.git

Update simple_abc9 tests
---

diff --git a/tests/simple_abc9/abc.box b/tests/simple_abc9/abc.box
deleted file mode 100644
index a8801d807..000000000
--- a/tests/simple_abc9/abc.box
+++ /dev/null
@@ -1,2 +0,0 @@
-MUXF8 1 0 3 1
-1 1 1
diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v
index e5837d480..688b47586 100644
--- a/tests/simple_abc9/abc9.v
+++ b/tests/simple_abc9/abc9.v
@@ -213,8 +213,13 @@ module arbiter (clk, rst, request, acknowledge, grant, grant_valid, grant_encode
   input rst;
 endmodule
 
-(* abc9_box_id=1, whitebox *)
+(* abc9_box, blackbox *)
 module MUXF8(input I0, I1, S, output O);
+specify
+    (I0 => O) = 0;
+    (I1 => O) = 0;
+    (S => O) = 0;
+endspecify
 endmodule
 
 // Citation: https://github.com/alexforencich/verilog-ethernet
diff --git a/tests/simple_abc9/run-test.sh b/tests/simple_abc9/run-test.sh
index 32d7a80ca..424d8f417 100755
--- a/tests/simple_abc9/run-test.sh
+++ b/tests/simple_abc9/run-test.sh
@@ -25,8 +25,8 @@ exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.v *.sv EXTRA_FLAGS="-n 300 -p
     synth -run coarse; \
     opt -full; \
     techmap; \
-    abc9 -lut 4 -box ../abc.box; \
+    abc9 -lut 4; \
     clean; \
     check -assert; \
     select -assert-none t:${DOLLAR}_NOT_ t:${DOLLAR}_AND_ %%; \
-    setattr -mod -unset whitebox'"
+    setattr -mod -unset blackbox'"