From: yimmanuel3@f4ac60d763911c3fa518755176e4b9ed455c75d8 Date: Mon, 6 Apr 2020 05:43:40 +0000 (+0100) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~2921 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9777fef748435863044c340a88e0c60947a544de;p=libreriscv.git --- diff --git a/resources.mdwn b/resources.mdwn index bb23a9430..bd6ae3d8c 100644 --- a/resources.mdwn +++ b/resources.mdwn @@ -6,10 +6,20 @@ up-to-date. Feel free to add more links here. [[!toc ]] +# Getting Started + +This section is primarily a series of useful links found online + +* [FSiC2019](https://wiki.f-si.org/index.php/FSiC2019) +* Fundamentals to learn to get started [[3d_gpu/tutorial]] + +## Is Open Source Hardware Profitable? +[RaptorCS on FOSS Hardware Interview](https://www.youtube.com/watch?v=o5Ihqg72T3c&feature=youtu.be) + # OpenPOWER ISA -* -* +* [3.0 PDF](https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0) +* [2.07 PDF](https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b) # RISC-V Instruction Set Architecture @@ -26,19 +36,25 @@ To fully take advantage of the RISC-V ecosystem, it is important to be compliant with the RISC-V standards. Doing so will allow us to to reuse most software as-is and avoid major forks. -* Official compiled PDFs of RISC-V ISA Manual: - -* Working draft of the proposed RISC-V Bitmanipulation extension: - -* RISC-V "V" Vector Extension: - +* [Official compiled PDFs of RISC-V ISA Manual] + (https://github.com/riscv/riscv-isa-manual/releases/latest) +* [Working draft of the proposed RISC-V Bitmanipulation extension](https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-draft.pdf) +* [RISC-V "V" Vector Extension](https://riscv.github.io/documents/riscv-v-spec/) +* [RISC-V Supervisor Binary Interface Specification](https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md) Note: As far as I know, we aren't using the RISC-V V Extension directly at the moment. However, there are many wiki pages that make a reference to the V extension so it would be good to include it here as a reference for comparative/informative purposes with regard to Simple-V. -# IEEE Standard for Floating-Point Arithmetic (IEEE 754) + +# RTL Arithmetic SQRT, FPU etc. + +## Sqrt +* [Fast Floating Point Square Root](https://pdfs.semanticscholar.org/5060/4e9aff0e37089c4ab9a376c3f35761ffe28b.pdf) +* [Reciprocal Square Root Algorithm](http://www.acsel-lab.com/arithmetic/arith15/papers/ARITH15_Takagi.pdf) + +## IEEE Standard for Floating-Point Arithmetic (IEEE 754) Almost all modern computers follow the IEEE Floating-Point Standard. Of course, we will follow it as well for interoperability. @@ -62,28 +78,21 @@ Kazan driver. Thus the [[zfpacc_proposal]] has been created which permits runtime dynamic switching between different accuracy levels, in userspace applications. -**SPIR-V Main Page ** +[**SPIR-V Main Page Link**](https://www.khronos.org/registry/spir-v/) -* SPIR-V 1.5 Specification Revision 1: - -* SPIR-V OpenCL Extended Instruction Set: - -* SPIR-V GLSL Extended Instruction Set: - +* [SPIR-V 1.5 Specification Revision 1](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html) +* [SPIR-V OpenCL Extended Instruction Set](https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html) +* [SPIR-V GLSL Extended Instruction Set](https://www.khronos.org/registry/spir-v/specs/unified1/GLSL.std.450.html) -**Vulkan Main Page ** +[**Vulkan Main Page Link**](https://www.khronos.org/registry/vulkan/) -* Vulkan 1.1.122: - +* [Vulkan 1.1.122](https://www.khronos.org/registry/vulkan/specs/1.1-extensions/html/index.html) -**OpenCL Main Page ** +[**OpenCL Main Page**](https://www.khronos.org/registry/OpenCL/) -* OpenCL 2.2 API Specification: - -* OpenCL 2.2 Extension Specification: - -* OpenCL 2.2 SPIR-V Environment Specification: - +* [OpenCL 2.2 API Specification](https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_API.html) +* [OpenCL 2.2 Extension Specification](https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Ext.html) +* [OpenCL 2.2 SPIR-V Environment Specification](https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Env.html) Note: We are implementing hardware accelerated Vulkan and OpenCL while relying on other software projects to translate APIs to @@ -113,7 +122,9 @@ although performance is not evaluated. Truly open bi-weekly teleconference lines for anybody interested in helping advance or adopting the POWER architecture. -# Free Silicon Conference +# Conferences + +## Free Silicon Conference The conference brought together experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and @@ -223,41 +234,53 @@ ZipCPU provides a comprehensive tutorial for beginners and many exercises/quizze * -# Information Resources and Tutorials - -This section is primarily a series of useful links found online +# Python RTL Tools +* [Migen - a Python RTL](https://jeffrey.co.in/blog/2014/01/d-flip-flop-using-migen/) +* [LiTeX](https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers) + An SOC builder written in Python Migen DSL. Allows you to generate functional + RTL for a SOC configured with cache, a RISCV core, ethernet, DRAM support, + and parameterizeable CSRs. +* [Migen Tutorial](http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>) +* [Minerva](https://github.com/lambdaconcept/minerva) + An SOC written in Python nMigen DSL -* FSiC2019 -* Fundamentals to learn to get started [[3d_gpu/tutorial]] -* -* -* +* [Using our Python Unit Tests(old)](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html) * * -* -* Samuel's KC5 code + + +## Other +* + +# Real/Physical Projects +* [Samuel's KC5 code](http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu) * * -* -* - +* +* * +* +* + +# Funding * -* -* -* +* [NLNet Applications](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02) + +# Good Programming/Design Practices +* [Liskov Substitution Principle](https://en.wikipedia.org/wiki/Liskov_substitution_principle) +* [Principle of Least Astonishment](https://en.wikipedia.org/wiki/Principle_of_least_astonishment) * -* -* -* -* -* -* -* -* +* [Rust-Lang Philosophy and Consensus](http://smallcultfollowing.com/babysteps/blog/2019/04/19/aic-adventures-in-consensus/) + + + * * * Fundamentals of Modern VLSI Devices +# Broken Links +* + # Analog Simulation *