From: Brad Beckmann <Brad.Beckmann@amd.com>
Date: Mon, 7 Feb 2011 06:14:18 +0000 (-0800)
Subject: ruby: Assert for x86 misaligned access
X-Git-Tag: stable_2012_02_02~590
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9782ca5defac34d8e6acfb8304ed2f35908f7a72;p=gem5.git

ruby: Assert for x86 misaligned access

This patch ensures only aligned access are passed to ruby and includes a fix
to the DPRINTF address print.
---

diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index ea1ff04f0..b3225cdca 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -226,6 +226,9 @@ RubyPort::M5Port::recvTiming(PacketPtr pkt)
                              pkt->getSize(), pc, type,
                              RubyAccessMode_Supervisor, pkt);
 
+    assert(Address(ruby_request.paddr).getOffset() + ruby_request.len <=
+        RubySystem::getBlockSizeBytes());
+
     // Submit the ruby request
     RequestStatus requestStatus = ruby_port->makeRequest(ruby_request);
 
@@ -237,7 +240,7 @@ RubyPort::M5Port::recvTiming(PacketPtr pkt)
     }
 
     DPRINTF(MemoryAccess,
-            "Request for address #x did not issue because %s\n",
+            "Request for address %#x did not issue because %s\n",
             pkt->getAddr(), RequestStatus_to_string(requestStatus));
 
     SenderState* senderState = safe_cast<SenderState*>(pkt->senderState);