From: Dmitry Selyutin Date: Sat, 2 Oct 2021 09:23:02 +0000 (+0000) Subject: fixedlogical: simplify extsb X-Git-Tag: sv_maxu_works-initial~780 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=97be71f59e73b8ee938a5a9423db1e422b23ee04;p=openpower-isa.git fixedlogical: simplify extsb --- diff --git a/openpower/isa/fixedlogical.mdwn b/openpower/isa/fixedlogical.mdwn index b641843c..067a43ff 100644 --- a/openpower/isa/fixedlogical.mdwn +++ b/openpower/isa/fixedlogical.mdwn @@ -223,9 +223,7 @@ X-Form Pseudo-code: - s <- (RS)[56] - RA[56:63] <- (RS)[56:63] - RA[0:55] <- [s]*56 + RA <- EXTSXL(RS, 8) Special Registers Altered: