From: lkcl <lkcl@web>
Date: Tue, 9 Jun 2020 21:16:46 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2493
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9808a71e9bf32c2dd04b60fc82822700207f7c07;p=libreriscv.git

---

diff --git a/Documentation/SOC/index.mdwn b/Documentation/SOC/index.mdwn
index 814b8fa3a..55001b9f0 100644
--- a/Documentation/SOC/index.mdwn
+++ b/Documentation/SOC/index.mdwn
@@ -3,7 +3,7 @@ The SOC is designed to be compliant with POWER 3.0B with somewhere near
 
 # Decoder
 
-The Decoder currently uses a class called PowerOp which get instantiated
+The Decoder uses a class called PowerOp which get instantiated
 for every instruction. PowerOp class instantiation has member signals
 whose values get set respectively for each instruction.