From: Richard Biener Date: Thu, 27 Jul 2017 12:01:21 +0000 (+0000) Subject: re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily ... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9811e84c99df6269baa406c7f42d479b342087c4;p=gcc.git re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression]) 2017-07-27 Richard Biener PR tree-optimization/81502 * tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR with incompatible but same sized type. (execute_update_addresses_taken): Likewise. * gcc.target/i386/vect-insert-1.c: New testcase. From-SVN: r250620 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 845dd756d53..5fcaae2eba6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-07-27 Richard Biener + + PR tree-optimization/81502 + * tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR + with incompatible but same sized type. + (execute_update_addresses_taken): Likewise. + 2017-07-27 James Greenhalgh * tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index cc300dc32e8..292fa5b7885 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-07-27 Richard Biener + + PR tree-optimization/81502 + * gcc.target/i386/vect-insert-1.c: New testcase. + 2017-07-27 Andreas Krebbel PR target/81534 diff --git a/gcc/testsuite/gcc.target/i386/vect-insert-1.c b/gcc/testsuite/gcc.target/i386/vect-insert-1.c new file mode 100644 index 00000000000..55cc52334c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vect-insert-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O -msse2 -fdump-tree-ccp1" } */ + +typedef int v4si __attribute__((vector_size(16))); + +float f; + +v4si foo (v4si a) +{ + __builtin_memcpy ((char *)&a + 4, &f, 4); + return a; +} + +/* { dg-final { scan-tree-dump "Now a gimple register: a" "ccp1" } } */ +/* { dg-final { scan-tree-dump "BIT_INSERT_EXPR