From: lkcl Date: Sun, 28 Nov 2021 23:33:05 +0000 (+0000) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~3338 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=987310dd9bc1e5b3eb838642cb8c053e2104e66a;p=libreriscv.git --- diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn index 329163f7f..8538b53b2 100644 --- a/docs/pinmux.mdwn +++ b/docs/pinmux.mdwn @@ -221,7 +221,9 @@ and triaging of faults. ## C4M JTAG TAP Staf Verhaegen's Chips4Makers JTAG TAP module includes everything -needed to create JTAG Boundary Scan Shift Registers. However, +needed to create JTAG Boundary Scan Shift Registers, +as well as the IEEE 1149.1 Finite State Machine to access +them through TMS, TDO, TDI and TCK Signalling. However, connecting up cores (a hardware term: the equivalent software term is "peripherals") on one side and the pads on the other is especially confusing, but deceptively simple. The actual addition