From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 23 Jun 2018 08:57:42 +0000 (+0100)
Subject: update
X-Git-Tag: convert-csv-opcode-to-binary~5119
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=989d018425f243ab9d3959108356eba243ad57ae;p=libreriscv.git

update
---

diff --git a/simple_v_extension/simple_v_chennai_2018.tex b/simple_v_extension/simple_v_chennai_2018.tex
index 14e593c43..46b8b5dc0 100644
--- a/simple_v_extension/simple_v_chennai_2018.tex
+++ b/simple_v_extension/simple_v_chennai_2018.tex
@@ -66,7 +66,7 @@
   \end{itemize}
   However...
    \begin{itemize}
-   \item 98 percent opcode duplication with rest of RV (CLIP)
+   \item 98 percent opcode duplication with rest of RV
    \item Extending RVV requires customisation not just of h/w:\\
 	     gcc, binutils also need customisation (and maintenance)
    \item Fascinatingly, despite being a SIMD-variant, RVV only has