From: Dmitry Selyutin Date: Sun, 4 Jun 2023 09:17:33 +0000 (+0300) Subject: power_enums: simplify selectors string conversion X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=989e20d410f06fa1e375898df1658b5af2143b02;p=openpower-isa.git power_enums: simplify selectors string conversion --- diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py index f4fe3515..7285bd76 100644 --- a/src/openpower/decoder/power_enums.py +++ b/src/openpower/decoder/power_enums.py @@ -217,7 +217,7 @@ class SVEType(Enum): EXTRA3 = 2 EXTRA32 = 3 # mixed EXTRA3 and EXTRA2 using RM bits 6&7 for MASK_SRC - def __repr__(self): + def __str__(self): return self.name @@ -226,7 +226,7 @@ class SVMaskSrc(Enum): NO = 0 EN = 1 - def __repr__(self): + def __str__(self): return self.name @@ -992,6 +992,11 @@ class In1Sel(Enum): CIA = 8 # for addpcis RT = 9 + def __str__(self): + if self is In1Sel.RA_OR_ZERO: + return "RA0" + return self.name + @property def type(self): if self is In1Sel.NONE: @@ -1023,6 +1028,9 @@ class In2Sel(Enum): CONST_DXHI4 = 18 # for addpcis CONST_DQ = 19 # for ld/st-quad + def __str__(self): + return self.name + @property def type(self): if self is In2Sel.NONE: @@ -1043,6 +1051,9 @@ class In3Sel(Enum): RTp = RT FRA = 7 + def __str__(self): + return self.name + @property def type(self): if self is In3Sel.NONE: @@ -1065,6 +1076,11 @@ class OutSel(Enum): RSp = RS FRA = 8 + def __str__(self): + if self is OutSel.RT_OR_ZERO: + return "RT0" + return self.name + @property def type(self): if self is OutSel.NONE: @@ -1120,6 +1136,9 @@ class CRInSel(Enum): CR1 = 7 BA = 8 + def __str__(self): + return self.name + @property def type(self): if self is CRInSel.NONE: @@ -1132,6 +1151,9 @@ class CRIn2Sel(Enum): NONE = 0 BB = 1 + def __str__(self): + return self.name + @property def type(self): if self is CRIn2Sel.NONE: @@ -1148,6 +1170,9 @@ class CROutSel(Enum): WHOLE_REG = 4 CR1 = 5 + def __str__(self): + return self.name + @property def type(self): if self is CROutSel.NONE: