From: lkcl <lkcl@web>
Date: Wed, 30 Jun 2021 19:55:26 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~683
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=98c79f05869cd08140d727a93837b72be20315fa;p=libreriscv.git

---

diff --git a/openpower/sv/register_type_tags.mdwn b/openpower/sv/register_type_tags.mdwn
index 3a56e6f72..f5ca7a3c9 100644
--- a/openpower/sv/register_type_tags.mdwn
+++ b/openpower/sv/register_type_tags.mdwn
@@ -6,3 +6,6 @@ A concept present in processors such as Texas Instruments DSPs and in the Mill A
 
 This allows instructions originally designed to only be IEEE754 FP64 fir example to become IEEE754 FP128 or even complex mumbers.  With SVP64 supporting [[sv/remap]] it is not conceptually that much of a leap to support complex numbers, given that the hardware to do so is already in place.
 
+Links:
+
+* <http://lists.libre-soc.org/pipermail/libre-soc-dev/2021-June/003256.html>