From: lkcl <lkcl@web>
Date: Mon, 5 Sep 2022 15:21:36 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~676
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=98f7f040fb92e2cb23b78b47e3d9614dc3aeaea9;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index dbb18875e..92e3dfc59 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -284,6 +284,12 @@ not make sense. Many 3-input instructions (madd, fmadd) unlike Scalar
 Reduction in particular do not make sense, but `ternlogi`, if used
 with care, would.
 
+Critical to note regarding use of Parallel-Reduction REMAP is that,
+exactly as with Matrix Mode, the `svshape` instruction *requests*
+a certain Vector Length (number of elements to reduce) and then
+sets VL and MAXVL at the number of **operations** needed to be
+carried out.
+
 **Parallel-Reduction with Predication**
 
 To avoid breaking the strict RISC-paradigm, keeping the Issue-Schedule