From: Omair Javaid Date: Fri, 3 Jan 2014 19:15:32 +0000 (+0500) Subject: gdb: ARM: Fix for bug in pop instruction decoding X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9904a494c1f85d283ffa7c18ac5103d2ff2feba6;p=binutils-gdb.git gdb: ARM: Fix for bug in pop instruction decoding This patch fixes thumb push instruction recording by replacing base register from pc to sp. gdb/ChangeLog: 2014-01-15 Omair Javaid * arm-tdep.c (thumb_record_misc): Update to use sp as base register for push instruction recording. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index ccc83402239..10705876019 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2014-01-15 Omair Javaid + + * arm-tdep.c (thumb_record_misc): Update to use sp as base + register for push instruction recording. + 2014-01-15 Omair Javaid * arm-tdep.c (thumb_record_misc): Update to correct logical diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index c945cbd0717..009536a9561 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -12204,7 +12204,7 @@ thumb_record_misc (insn_decode_record *thumb_insn_r) { /* PUSH. */ register_bits = bits (thumb_insn_r->arm_insn, 0, 7); - regcache_raw_read_unsigned (reg_cache, ARM_PC_REGNUM, &u_regval); + regcache_raw_read_unsigned (reg_cache, ARM_SP_REGNUM, &u_regval); while (register_bits) { if (register_bits & 0x00000001)