From: Pat Haugen Date: Wed, 20 Feb 2019 17:50:28 +0000 (+0000) Subject: target-supports.exp (check_effective_target_vect_usad_char): Add PowerPC support. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=990525f659db023bbcaf8d313916e4533843c664;p=gcc.git target-supports.exp (check_effective_target_vect_usad_char): Add PowerPC support. * lib/target-supports.exp (check_effective_target_vect_usad_char): Add PowerPC support. * gcc.dg/vect/slp-reduc-sad.c: Update scan string. * gcc.dg/vect/vect-reduc-sad.c: Likewise. From-SVN: r269043 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d7240090c03..7a407cdba20 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2019-02-20 Pat Haugen + + * lib/target-supports.exp (check_effective_target_vect_usad_char): + Add PowerPC support. + * gcc.dg/vect/slp-reduc-sad.c: Update scan string. + * gcc.dg/vect/vect-reduc-sad.c: Likewise. + 2019-02-20 Andre Vieira PR target/86487 diff --git a/gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c b/gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c index 5f7a3e09f60..15b286acdbd 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c +++ b/gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c @@ -58,6 +58,6 @@ main () return 0; } -/* { dg-final { scan-tree-dump "vect_recog_sad_pattern: detected" "vect" } } */ +/* { dg-final { scan-tree-dump "sad pattern recognized" "vect" } } */ /* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c index 2d8bc7c8601..a033a7d27d1 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c @@ -49,6 +49,6 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vect_recog_sad_pattern: detected" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "sad pattern recognized" 1 "vect" } } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 94cb319bc12..bf64b2b29e1 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6047,7 +6047,9 @@ proc check_effective_target_vect_usad_char { } { expr { [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget aarch64*-*-*] - && ![check_effective_target_aarch64_sve])}}] + && ![check_effective_target_aarch64_sve]) + || ([istarget powerpc*-*-*] + && [check_p9vector_hw_available])}}] } # Return 1 if the target plus current options supports both signed