From: Miodrag Milanovic Date: Wed, 2 Feb 2022 09:15:22 +0000 (+0100) Subject: respect hide_internal flag X-Git-Tag: yosys-0.14~2^2~4 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=990aee5531f41fdf01887870047eb924f12618b9;p=yosys.git respect hide_internal flag --- diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index 3c8d03cba..d33c20c51 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -161,7 +161,7 @@ struct SimInstance } } - if (shared->fst) { + if ((shared->fst) && !(shared->hide_internal && wire->name[0] == '$')) { fstHandle id = shared->fst->getHandle(scope + "." + RTLIL::unescape_id(wire->name)); if (id==0 && wire->name.isPublic()) log_warning("Unable to found wire %s in input file.\n", (scope + "." + RTLIL::unescape_id(wire->name)).c_str());