From: Staf Verhaegen <staf@stafverhaegen.be>
Date: Mon, 12 Apr 2021 11:24:28 +0000 (+0200)
Subject: Reduce core size.
X-Git-Tag: LS180_RC3~131
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99206e8e766e97cd286dbea0b5b6b7cf6890613d;p=soclayout.git

Reduce core size.

Using 45nm cells makes the design Pad limited.
---

diff --git a/experiments9/freepdk_c4m45/doDesign.py b/experiments9/freepdk_c4m45/doDesign.py
index b39f53f..6648fe0 100644
--- a/experiments9/freepdk_c4m45/doDesign.py
+++ b/experiments9/freepdk_c4m45/doDesign.py
@@ -135,8 +135,8 @@ def scriptMain (**kw):
    #helpers.setTraceLevel( 550 )
    #Breakpoint.setStopLevel( 100 )
     rvalue     = True
-   #coreSize   = u(37*90.0)
-    coreSize   = u(59*90.0)
+    coreSize   = u(37*90.0)
+   #coreSize   = u(59*90.0)
     chipBorder = u(2*214.0 + 10*13.0)
     ioSpecs    = IoSpecs()
     pinmuxFile = './ls180/litex_pinpads.json'