From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 29 Dec 2020 14:22:00 +0000 (+0000)
Subject: update sv_analysis
X-Git-Tag: convert-csv-opcode-to-binary~731
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9953bf2363ffb4189c5fecea0fb35c7a4a365396;p=libreriscv.git

update sv_analysis
---

diff --git a/openpower/isatables/RM-1P-2S1D.csv b/openpower/isatables/RM-1P-2S1D.csv
index 3b5639f9f..6a702118b 100644
--- a/openpower/isatables/RM-1P-2S1D.csv
+++ b/openpower/isatables/RM-1P-2S1D.csv
@@ -20,6 +20,8 @@ moduw,1P,EXTRA3,d:RT,s:RA,s:RB,0,RA,RB,0,RT,0,0
 cmpb,1P,EXTRA3,d:RA,s:RS,s:RB,0,RS,RB,0,RA,0,0
 modsd,1P,EXTRA3,d:RT,s:RA,s:RB,0,RA,RB,0,RT,0,0
 modsw,1P,EXTRA3,d:RT,s:RA,s:RB,0,RA,RB,0,RT,0,0
+26/6=fmrgow,1P,EXTRA3,d:FRT,s:FRA,s:FRB,0,FRA,FRB,0,FRT,0,0
+30/6=fmrgew,1P,EXTRA3,d:FRT,s:FRA,s:FRB,0,FRA,FRB,0,FRT,0,0
 rlwnm,1P,EXTRA3,"d:RA,d:CR0",s:RB,s:RS,0,0,RB,RS,RA,0,CR0
 rldcl,1P,EXTRA3,"d:RA,d:CR0",s:RB,s:RS,0,0,RB,RS,RA,0,CR0
 rldcr,1P,EXTRA3,"d:RA,d:CR0",s:RB,s:RS,0,0,RB,RS,RA,0,CR0
@@ -89,5 +91,3 @@ fmul,1P,EXTRA3,"d:FRT,d:CR1",s:FRA,s:FRC,0,FRA,0,FRC,FRT,0,CR1
 rlwimi,1P,EXTRA3,"d:RA,d:CR0",s:RA,s:RS,0,RA,0,RS,RA,0,CR0
 rldimi,1P,EXTRA3,"d:RA,d:CR0",s:RA,s:RS,0,RA,0,RS,RA,0,CR0
 rldimi,1P,EXTRA3,"d:RA,d:CR0",s:RA,s:RS,0,RA,0,RS,RA,0,CR0
-26/6=fmrgow,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,FRT,0,0
-30/6=fmrgew,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,FRT,0,0
diff --git a/openpower/isatables/minor_63l.csv b/openpower/isatables/minor_63l.csv
index 5313a3311..580e20819 100644
--- a/openpower/isatables/minor_63l.csv
+++ b/openpower/isatables/minor_63l.csv
@@ -7,8 +7,8 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou
 0b011000001,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/6=mtfsb1,
 0b011000010,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/6=mtfsb0,
 0b011000100,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/6=mtfsfi,
-0b011011010,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,26/6=fmrgow,
-0b011011110,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,30/6=fmrgew,
+0b011011010,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,26/6=fmrgow,
+0b011011110,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,30/6=fmrgew,
 0b011110010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,18/7=mffsfamily,
 0b011110110,FPU,OP_FPOP_I,NONE,FRB,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,22/7=mtfsf,
 0b100000000,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/8=fcpsgn,
diff --git a/openpower/opcode_regs_deduped.mdwn b/openpower/opcode_regs_deduped.mdwn
index b9edb6abc..dcb3bcdeb 100644
--- a/openpower/opcode_regs_deduped.mdwn
+++ b/openpower/opcode_regs_deduped.mdwn
@@ -37,7 +37,6 @@ CR=2R1W | RM-1P-2S1D  |
 2R-1W-CRo | RM-1P-2S1D  |
 2R-1W-CRo | RM-1P-2S1D  |
 2R-1W-CRi | RM-1P-3S1D  |
-2R-1W-CRio | RM-1P-2S1D  |
 3R-1W-CRo | -  |
 3R-1W-CRio | RM-1P-3S1D  |
 """]]
@@ -77,7 +76,6 @@ OTHER | 2 | 1 | 0 | 0 |  |  |  2R-1W |
 OTHER | 2 | 1 | 0 | 1 |  |  |  2R-1W-CRo |
 OTHER | 2 | 1 | 0 | 1 | 1 | SH/SH32 |  2R-1W-CRo |
 OTHER | 2 | 1 | 1 | 0 |  |  |  2R-1W-CRi |
-OTHER | 2 | 1 | 1 | 1 |  |  |  2R-1W-CRio |
 OTHER | 3 | 1 | 0 | 1 |  |  |  3R-1W-CRo |
 OTHER | 3 | 1 | 1 | 1 |  |  |  3R-1W-CRio |
 """]]
@@ -442,6 +440,8 @@ minor_31.csv | 0b0100001011 | moduw | X-Form |
 minor_31.csv | 0b0111111100 | cmpb | X-Form |
 minor_31.csv | 0b1100001001 | modsd | X-Form |
 minor_31.csv | 0b1100001011 | modsw | X-Form |
+minor_63l.csv | 0b011011010 | 26/6=fmrgow | -Form |
+minor_63l.csv | 0b011011110 | 30/6=fmrgew | -Form |
 """]]
 
 ## 2R-1W-CRo (RM-1P-2S1D)
@@ -563,14 +563,6 @@ minor_31.csv | 0b1111001111 | isel | A-Form |
 minor_31.csv | 0b1111101111 | isel | A-Form |
 """]]
 
-## 2R-1W-CRio (RM-1P-2S1D)
-
-[[!table  data="""
-CSV | opcode | asm | form |
-minor_63l.csv | 0b011011010 | 26/6=fmrgow | -Form |
-minor_63l.csv | 0b011011110 | 30/6=fmrgew | -Form |
-"""]]
-
 ## 3R-1W-CRo (-)
 
 [[!table  data="""
@@ -618,7 +610,6 @@ minor_59.csv | 0b11111 | fnmadds | -Form |
 * **2R-1W-CRo**: RM-1P-2S1D
 * **2R-1W-CRo**: RM-1P-2S1D
 * **2R-1W-CRi**: RM-1P-3S1D
-* **2R-1W-CRio**: RM-1P-2S1D
 * **3R-1W-CRo**: -
 * **3R-1W-CRio**: RM-1P-3S1D
 
diff --git a/openpower/sv_analysis.py b/openpower/sv_analysis.py
index b354bb3fc..487602312 100644
--- a/openpower/sv_analysis.py
+++ b/openpower/sv_analysis.py
@@ -479,6 +479,10 @@ def process_csvs():
                     res['0'] = 'd:BF' # BF: Rdest1_EXTRA3
                     res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
                     res['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
+                elif regs == ['FRA','FRB','','FRT','','']:
+                    res['0'] = 'd:FRT' # FRT: Rdest1_EXTRA3
+                    res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
+                    res['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
                 elif regs == ['FRA','FRB','','FRT','','CR1']:
                     res['0'] = 'd:FRT,d:CR1' # FRT,CR1: Rdest1_EXTRA3
                     res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3