From: lkcl <lkcl@web>
Date: Thu, 5 May 2022 19:16:07 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2421
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9988de8e6ed77526a7ce07a6f147a54f8d240c8e;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 2fac410d7..4708e73e5 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -259,10 +259,13 @@ of:
 * Writing an awful lot of Specification Documentation
   (4 years and counting)
 
-Once the basics of this concept have sunk in, advancements quickly
-follow:
+Once the basics of this concept have sunk in, early
+advancements quickly follow naturally from analysis
+of the problem-space:
 
-* Predication (an absolutely critical component for a Vector ISA).
+* Predication (an absolutely critical component for a Vector ISA),
+  then the next logical advancement is to allow separate predication masks
+  to be applied to *both* the source *and* the destination, independently.
 * Element-width overrides: most Scalar ISAs today are 64-bit only,
   with primarily Load and Store being able to handle 8/16/32/64
   and sometimes 128-bit (quad-word), where Vector ISAs need to
@@ -271,5 +274,5 @@ follow:
 * "Reordering" of the assumption of linear sequential element
   access, for Matrices, rotations, transposition, Convolutions,
   DCT, FFT, Parallel Prefix-Sum and other common transformations
-  that require significant effort in other ISAs.
+  that require significant programming effort in other ISAs.