From: Clifford Wolf Date: Tue, 11 Mar 2014 13:06:57 +0000 (+0100) Subject: Added support for `line compiler directive X-Git-Tag: yosys-0.3.0~66 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9992026a8d4482abd8fbae8cb246a87cbbbde364;p=yosys.git Added support for `line compiler directive --- diff --git a/frontends/verilog/lexer.l b/frontends/verilog/lexer.l index 79f44b4a6..e3e5e4ab2 100644 --- a/frontends/verilog/lexer.l +++ b/frontends/verilog/lexer.l @@ -75,6 +75,17 @@ namespace VERILOG_FRONTEND { ln_stack.pop_back(); } +"`line"[ \t]+[^ \t\r\n]+[ \t]+\"[^ \r\n]+\"[^\r\n]*\n { + char *p = yytext + 5; + while (*p == ' ' || *p == '\t') p++; + frontend_verilog_yyset_lineno(atoi(p)); + while (*p && *p != ' ' && *p != '\t') p++; + while (*p == ' ' || *p == '\t') p++; + char *q = *p ? p + 1 : p; + while (*q && *q != '"') q++; + current_filename = std::string(p).substr(1, q-p-1); +} + "`file_notfound "[^\n]* { log_error("Can't open include file `%s'!\n", yytext + 15); }