From: Martin Liska <mliska@suse.cz>
Date: Fri, 23 Sep 2016 09:32:15 +0000 (+0200)
Subject: Fix typos: adress -> address
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99924e7a7b1be1c07dd2760485a07069a52a4023;p=gcc.git

Fix typos: adress -> address

	* config/s390/vx-builtins.md: Replace 'adress' with 'address'.

From-SVN: r240406
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1ffee95a749..8c3b8db691f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-09-23  Martin Liska  <mliska@suse.cz>
+
+	* config/s390/vx-builtins.md: Replace 'adress' with 'address'.
+
 2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>
 
 	* config/arm/arm.c (arm_evpc_neon_vuzp): Add support for V8HF and
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 444c277d997..c6ac44c9822 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -389,7 +389,7 @@
 
 ; vscef, vsceg
 
-; A 64 bit target adress generated from 32 bit elements
+; A 64 bit target address generated from 32 bit elements
 (define_insn "vec_scatter_elementv4si_DI"
   [(set (mem:SI
 	 (plus:DI (zero_extend:DI
@@ -417,7 +417,7 @@
   "vsce<V_HW_64:bhfgq>\t%v0,%O2(%v1,%R2),%3"
   [(set_attr "op_type" "VRV")])
 
-; Element size and target adress size is the same
+; Element size and target address size is the same
 (define_insn "vec_scatter_element<mode>_<non_vec_int>"
   [(set (mem:<non_vec>
 	 (plus:<non_vec_int> (unspec:<non_vec_int>