From: lkcl <lkcl@web>
Date: Thu, 5 May 2022 20:09:14 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2419
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99b008e1568fc5db0497e74ae01d8116528d53ee;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index f6f717b71..d8424ae51 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -282,12 +282,15 @@ Remarkably, very little.
 
 * The traditional `iota` instruction may be
   synthesised with an overlapping add, that stacks up incrementally
-  and sequentially.  Although it requires two instructions, one to
-  start the sum-chain, the technique has the advantage of allowing
+  and sequentially.  Although it requires two instructions (one to
+  start the sum-chain) the technique has the advantage of allowing
   increments by arbitrary amounts, and is not limited to addition,
   either.
 * Big-integer addition (arbitrary-precision arithmetic) is an
-  emergent characteristic the carry-in, carry-out capability of
-  Power ISA `adde` instruction. `sv.adde` naturally emerges from the
+  emergent characteristic from the carry-in, carry-out capability of
+  Power ISA `adde` instruction. `sv.adde` as a BigNum add
+  naturally emerges from the
   sequential chaining of these scalar instructions.
-* 
+* The Condition Register Fields of the Power ISA make a great candidate
+  for use as Predicate Masks, particularly when combined with
+  Vectorised `cmp` and Vectorised `crand`, `crxor` etc.