From: Kenneth Graunke Date: Mon, 9 Jan 2012 04:42:22 +0000 (-0800) Subject: i965: Enable SIMD16 mode for shaders with loops on Gen6+. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99cd475cc9d3bd54140f84c24b55b9e05d7310a1;p=mesa.git i965: Enable SIMD16 mode for shaders with loops on Gen6+. The hardware supports it; there's no reason not to. Signed-off-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 15eae43f487..b4ef80b6546 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1676,7 +1676,7 @@ fs_visitor::visit(ir_loop *ir) { fs_reg counter = reg_undef; - if (c->dispatch_width == 16) { + if (intel->gen < 6 && c->dispatch_width == 16) { fail("Can't support (non-uniform) control flow on 16-wide\n"); }