From: lkcl <lkcl@web>
Date: Thu, 23 Jun 2022 18:30:24 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1560
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99d05ccd5a0b971f38f85abeea438fedfde3aa46;p=libreriscv.git

---

diff --git a/openpower/sv/svstep.mdwn b/openpower/sv/svstep.mdwn
index 18a0770e3..02fb6cc50 100644
--- a/openpower/sv/svstep.mdwn
+++ b/openpower/sv/svstep.mdwn
@@ -54,4 +54,5 @@ it may then be used as the input to Indexed REMAP Mode
 to achieve the exact same Schedule. It is evident however that
 before use some of the Indices may be arbitrarily altered as desired.
 `sv.svstep helps the programmer having to manually recreate certain
-types of common Loop patterns.*
+types of common Loop patterns, and in its simplest form, without REMAP,
+is equivalent to the `iota` instruction found in other Vector ISAs*