From: Pat Haugen <pthaugen@us.ibm.com>
Date: Fri, 31 Mar 2017 15:59:46 +0000 (+0000)
Subject: re PR target/80107 (ICE in final_scan_insn, at final.c:2964)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=99e6cfd6c194562c4f98529a5638cb6490db1715;p=gcc.git

re PR target/80107 (ICE in final_scan_insn, at final.c:2964)

	PR target/80107
	* config/rs6000/rs6000.md (extendhi<mode>2): Add test for
	TARGET_VSX_SMALL_INTEGER.
	* gfortran.dg/pr80107.f: New.

From-SVN: r246619
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3fd3b841698..7074e7eee2f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-03-31  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/80107
+	* config/rs6000/rs6000.md (extendhi<mode>2): Add test for
+	TARGET_VSX_SMALL_INTEGER.
+
 2017-03-31  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
 	* doc/extend.texi (PowerPC AltiVec Built-in Functions):	Add
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d1da8042220..6e73f9d9524 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -954,7 +954,7 @@
 (define_insn "*extendhi<mode>2"
   [(set (match_operand:EXTHI 0 "gpc_reg_operand" "=r,r,?*wK,?*wK")
 	(sign_extend:EXTHI (match_operand:HI 1 "reg_or_mem_operand" "m,r,Z,wK")))]
-  "rs6000_gen_cell_microcode"
+  "rs6000_gen_cell_microcode || TARGET_VSX_SMALL_INTEGER"
   "@
    lha%U1%X1 %0,%1
    extsh %0,%1
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6e538299c96..02581a2ca65 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-03-31  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/80107
+	* gfortran.dg/pr80107.f: New.
+
 2017-03-31  Jeff Law  <law@redhat.com>
 
 	PR tree-optimization/49498
diff --git a/gcc/testsuite/gfortran.dg/pr80107.f b/gcc/testsuite/gfortran.dg/pr80107.f
new file mode 100644
index 00000000000..541fba8cd95
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr80107.f
@@ -0,0 +1,6 @@
+! { dg-do compile { target { powerpc*-*-* } } }
+! { dg-options "-O0 -mpower9-dform-vector -mno-gen-cell-microcode" }
+
+      integer(kind=2) j, j2, ja
+      call c_c(CMPLX(j),(1.,0.),'CMPLX(integer(2))')
+      end