From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Wed, 3 Jun 2020 11:47:39 +0000 (+0200)
Subject: soc/add_sdcard: remove limitation to 7-Series but only add clocker for it.
X-Git-Tag: 24jan2021_ls180~227
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9a026c09f9cd81fe31171627a9470ab36dbbb6b9;p=litex.git

soc/add_sdcard: remove limitation to 7-Series but only add clocker for it.
---

diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py
index e4db1e50..303d67f7 100644
--- a/litex/soc/integration/soc.py
+++ b/litex/soc/integration/soc.py
@@ -1251,31 +1251,29 @@ class LiteXSoC(SoC):
     def add_sdcard(self, name="sdcard", with_emulator=False):
         # Imports
         from litesdcard.phy import SDPHY
-        from litesdcard.clocker import SDClockerS7
         from litesdcard.core import SDCore
-        from litesdcard.bist import BISTBlockGenerator, BISTBlockChecker
         from litesdcard.data import SDDataReader, SDDataWriter
 
-        # Emulator
+        # Emulator / Pads
         if with_emulator:
             from litesdcard.emulator import SDEmulator, _sdemulator_pads
             sdcard_pads = _sdemulator_pads()
             self.submodules.sdemulator = SDEmulator(self.platform, sdcard_pads)
             self.add_csr("sdemulator")
         else:
-            assert self.platform.device[:3] == "xc7" # FIXME: Only supports 7-Series for now.
             sdcard_pads = self.platform.request(name)
 
+        # Clocking
+        if self.platform.device[:3] == "xc7":
+            from litesdcard.clocker import SDClockerS7
+            self.submodules.sdclk = SDClockerS7(sys_clk_freq=self.sys_clk_freq)
+            self.add_csr("sdclk")
+
         # Core
         if hasattr(sdcard_pads, "rst"):
             self.comb += sdcard_pads.rst.eq(0)
-        if with_emulator:
-            pass
-        else:
-            self.submodules.sdclk = SDClockerS7(sys_clk_freq=self.sys_clk_freq)
         self.submodules.sdphy   = SDPHY(sdcard_pads, self.platform.device)
         self.submodules.sdcore  = SDCore(self.sdphy)
-        self.add_csr("sdclk")
         self.add_csr("sdphy")
         self.add_csr("sdcore")