From: Alan Modra <amodra@gmail.com>
Date: Wed, 30 Aug 2017 11:05:35 +0000 (+0930)
Subject: PowerPC TPREL16_HA/LO reloc optimization
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9a23f96e919ba91587d077b1d399246dde4002dd;p=binutils-gdb.git

PowerPC TPREL16_HA/LO reloc optimization

In the TLS GD/LD to LE optimization, ld replaces a sequence like

 addi 3,2,x@got@tlsgd		R_PPC64_GOT_TLSGD16	x
 bl __tls_get_addr(x@tlsgd)	R_PPC64_TLSGD		x
				R_PPC64_REL24		__tls_get_addr
 nop

with

 addis 3,13,x@tprel@ha		R_PPC64_TPREL16_HA	x
 addi 3,3,x@tprel@l		R_PPC64_TPREL16_LO	x
 nop

When the tprel offset is small, this can be further optimized to

 nop
 addi 3,13,x@tprel
 nop

bfd/
	* elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt.
	(ppc64_elf_tls_optimize): Set it.
	(ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert
	insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when
	addis would add zero.
	* elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt.
	(ppc_elf_tls_optimize): Set it.
	(ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert
	insn on TPREL16_LO relocs to use r2 when addis would add zero.
gold/
	* powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on
	TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS
	relocs to use r2/r13 when addis would add zero.
ld/
	* testsuite/ld-powerpc/tls.s: Add calls with tls markers.
	* testsuite/ld-powerpc/tls32.s: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Run tls marker tests.
	* testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization.
	* testsuite/ld-powerpc/tlsexe.d: Likewise.
	* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
	* testsuite/ld-powerpc/tlsmark.d: Likewise.
	* testsuite/ld-powerpc/tlsopt4.d: Likewise.
	* testsuite/ld-powerpc/tlstoc.d: Likewise.
---

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ec74d9d2012..205b01674b6 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,15 @@
+2017-08-30  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt.
+	(ppc64_elf_tls_optimize): Set it.
+	(ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert
+	insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when
+	addis would add zero.
+	* elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt.
+	(ppc_elf_tls_optimize): Set it.
+	(ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert
+	insn on TPREL16_LO relocs to use r2 when addis would add zero.
+
 2017-08-30  Alan Modra  <amodra@gmail.com>
 
 	* elf64-ppc.c (ppc64_elf_relocate_section): When optimizing
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index a5d819386ae..2bdba9ff5ae 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -3345,6 +3345,9 @@ struct ppc_elf_link_hash_table
   unsigned int local_ifunc_resolver:1;
   unsigned int maybe_local_ifunc_resolver:1;
 
+  /* Set if tls optimization is enabled.  */
+  unsigned int do_tls_opt:1;
+
   /* The size of PLT entries.  */
   int plt_entry_size;
   /* The distance between adjacent PLT slots.  */
@@ -5631,6 +5634,7 @@ ppc_elf_tls_optimize (bfd *obfd ATTRIBUTE_UNUSED,
 	      symtab_hdr->contents = (unsigned char *) locsyms;
 	  }
       }
+  htab->do_tls_opt = 1;
   return TRUE;
 }
 
@@ -8426,10 +8430,44 @@ ppc_elf_relocate_section (bfd *output_bfd,
 	}
 
       addend = rel->r_addend;
-      tls_type = 0;
       howto = NULL;
       if (r_type < R_PPC_max)
 	howto = ppc_elf_howto_table[r_type];
+
+      switch (r_type)
+	{
+	default:
+	  break;
+
+	case R_PPC_TPREL16_HA:
+	  if (htab->do_tls_opt && relocation + addend + 0x8000 < 0x10000)
+	    {
+	      bfd_byte *p = contents + (rel->r_offset & ~3);
+	      unsigned int insn = bfd_get_32 (input_bfd, p);
+	      if ((insn & ((0x3f << 26) | 0x1f << 16))
+		  != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */)
+		/* xgettext:c-format */
+		info->callbacks->minfo
+		  (_("%H: warning: %s unexpected insn %#x.\n"),
+		   input_bfd, input_section, rel->r_offset, howto->name, insn);
+	      else
+		bfd_put_32 (input_bfd, NOP, p);
+	    }
+	  break;
+
+	case R_PPC_TPREL16_LO:
+	  if (htab->do_tls_opt && relocation + addend + 0x8000 < 0x10000)
+	    {
+	      bfd_byte *p = contents + (rel->r_offset & ~3);
+	      unsigned int insn = bfd_get_32 (input_bfd, p);
+	      insn &= ~(0x1f << 16);
+	      insn |= 2 << 16;
+	      bfd_put_32 (input_bfd, insn, p);
+	    }
+	  break;
+	}
+
+      tls_type = 0;
       switch (r_type)
 	{
 	default:
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 5b96a047e72..cf7c178c0ff 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -4120,6 +4120,9 @@ struct ppc_link_hash_table
   unsigned int second_toc_pass:1;
   unsigned int do_toc_opt:1;
 
+  /* Set if tls optimization is enabled.  */
+  unsigned int do_tls_opt:1;
+
   /* Set on error.  */
   unsigned int stub_error:1;
 
@@ -8925,6 +8928,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
 
   if (toc_ref != NULL)
     free (toc_ref);
+  htab->do_tls_opt = 1;
   return TRUE;
 }
 
@@ -15152,6 +15156,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
       /* Multi-instruction sequences that access the TOC can be
 	 optimized, eg. addis ra,r2,0; addi rb,ra,x;
 	 to             nop;           addi rb,r2,x;  */
+      howto = ppc64_elf_howto_table[(int) r_type];
       switch (r_type)
 	{
 	default:
@@ -15213,10 +15218,37 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	      bfd_put_32 (input_bfd, insn, p);
 	    }
 	  break;
+
+	case R_PPC64_TPREL16_HA:
+	  if (htab->do_tls_opt && relocation + addend + 0x8000 < 0x10000)
+	    {
+	      bfd_byte *p = contents + (rel->r_offset & ~3);
+	      insn = bfd_get_32 (input_bfd, p);
+	      if ((insn & ((0x3f << 26) | 0x1f << 16))
+		  != ((15u << 26) | (13 << 16)) /* addis rt,13,imm */)
+		/* xgettext:c-format */
+		info->callbacks->minfo
+		  (_("%H: warning: %s unexpected insn %#x.\n"),
+		   input_bfd, input_section, rel->r_offset, howto->name, insn);
+	      else
+		bfd_put_32 (input_bfd, NOP, p);
+	    }
+	  break;
+
+	case R_PPC64_TPREL16_LO:
+	case R_PPC64_TPREL16_LO_DS:
+	  if (htab->do_tls_opt && relocation + addend + 0x8000 < 0x10000)
+	    {
+	      bfd_byte *p = contents + (rel->r_offset & ~3);
+	      insn = bfd_get_32 (input_bfd, p);
+	      insn &= ~(0x1f << 16);
+	      insn |= 13 << 16;
+	      bfd_put_32 (input_bfd, insn, p);
+	    }
+	  break;
 	}
 
       /* Do any further special processing.  */
-      howto = ppc64_elf_howto_table[(int) r_type];
       switch (r_type)
 	{
 	default:
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 9359493cd27..23432155853 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,9 @@
+2017-08-30  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on
+	TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS
+	relocs to use r2/r13 when addis would add zero.
+
 2017-08-29  Alan Modra  <amodra@gmail.com>
 
 	* options.h (tls_get_addr_optimize): New option.
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 7f3f025d839..ff116e3b9fc 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -8974,6 +8974,38 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
 	    }
 	  break;
 
+	case elfcpp::R_POWERPC_TPREL16_HA:
+	  if (parameters->options().tls_optimize() && value + 0x8000 < 0x10000)
+	    {
+	      Insn* iview = reinterpret_cast<Insn*>(view - d_offset);
+	      Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+	      if ((insn & ((0x3f << 26) | 0x1f << 16))
+		  != ((15u << 26) | ((size == 32 ? 2 : 13) << 16)))
+		;
+	      else
+		{
+		  elfcpp::Swap<32, big_endian>::writeval(iview, nop);
+		  return true;
+		}
+	    }
+	  break;
+
+	case elfcpp::R_PPC64_TPREL16_LO_DS:
+	  if (size == 32)
+	    // R_PPC_TLSGD, R_PPC_TLSLD
+	    break;
+	  // Fall through.
+	case elfcpp::R_POWERPC_TPREL16_LO:
+	  if (parameters->options().tls_optimize() && value + 0x8000 < 0x10000)
+	    {
+	      Insn* iview = reinterpret_cast<Insn*>(view - d_offset);
+	      Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+	      insn &= ~(0x1f << 16);
+	      insn |= (size == 32 ? 2 : 13) << 16;
+	      elfcpp::Swap<32, big_endian>::writeval(iview, insn);
+	    }
+	  break;
+
 	case elfcpp::R_PPC64_ENTRY:
 	  value = (target->got_section()->output_section()->address()
 		   + object->toc_base_offset());
diff --git a/ld/ChangeLog b/ld/ChangeLog
index f1f7a7cc5b5..9e697e65055 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,16 @@
+2017-08-30  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/tls.s: Add calls with tls markers.
+	* testsuite/ld-powerpc/tls32.s: Likewise.
+	* testsuite/ld-powerpc/powerpc.exp: Run tls marker tests.
+	* testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization.
+	* testsuite/ld-powerpc/tlsexe.d: Likewise.
+	* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
+	* testsuite/ld-powerpc/tlsld.d: Likewise.
+	* testsuite/ld-powerpc/tlsmark.d: Likewise.
+	* testsuite/ld-powerpc/tlsopt4.d: Likewise.
+	* testsuite/ld-powerpc/tlstoc.d: Likewise.
+
 2017-08-30  Alan Modra  <amodra@gmail.com>
 
 	* testsuite/ld-powerpc/tls.d: Update.
diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index 4405fa38c7e..0735ab71c2c 100644
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -110,6 +110,11 @@ set ppcelftests {
     {"APUinfo NULL section processing" "-melf32ppc" ""
      "-a32 -me500" {apuinfo-nul1.s apuinfo-nul.s}
      {{readelf -x2 apuinfo-nul.rd}} "apuinfo"}
+    {"TLS32 static exec (markers)" "-melf32ppc" ""
+     "-a32 --defsym TLSMARK=1"  {tls32.s tlslib32.s}
+     {{objdump -dr tls32.d} {objdump -sj.got tls32.g}
+      {objdump -sj.tdata tls32.t}}
+     "tls32m"}
     {"TLS32 static exec" "-melf32ppc" "" "-a32"  {tls32.s tlslib32.s}
      {{objdump -dr tls32.d} {objdump -sj.got tls32.g}
       {objdump -sj.tdata tls32.t}}
@@ -119,47 +124,52 @@ set ppcelftests {
     {"TLS32 dynamic exec" "-melf32ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {}
      {{readelf -WSsrl tlsexe32.r} {objdump -dr tlsexe32.d}
       {objdump -sj.got tlsexe32.g} {objdump -sj.tdata tlsexe32.t}}
-      "tlsexe32"}
+     "tlsexe32"}
     {"TLS32 shared" "-shared -melf32ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o" "" "" {}
      {{readelf -WSsrl tlsso32.r} {objdump -dr tlsso32.d}
       {objdump -sj.got tlsso32.g} {objdump -sj.tdata tlsso32.t}}
-      "tls32.so"}
+     "tls32.so"}
     {"TLS32 markers" "-melf32ppc" "" "-a32"  {tlsmark32.s tlslib32.s}
      {{objdump -dr tlsmark32.d}}
-      "tlsmark32"}
+     "tlsmark32"}
     {"TLS32 opt 1" "-melf32ppc" "" "-a32"  {tlsopt1_32.s tlslib32.s}
      {{objdump -dr tlsopt1_32.d}}
-      "tlsopt1_32"}
+     "tlsopt1_32"}
     {"TLS32 opt 2" "-melf32ppc" "" "-a32"  {tlsopt2_32.s tlslib32.s}
      {{objdump -dr tlsopt2_32.d}}
-      "tlsopt2_32"}
+     "tlsopt2_32"}
     {"TLS32 opt 3" "-melf32ppc" "" "-a32"  {tlsopt3_32.s tlslib32.s}
      {{objdump -dr tlsopt3_32.d}}
       "tlsopt3_32"}
     {"TLS32 opt 4" "-melf32ppc" "" "-a32"  {tlsopt4_32.s tlslib32.s}
      {{objdump -dr tlsopt4_32.d}}
-      "tlsopt4_32"}
-    {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" "" "-a32" {tlsdll_32.s}
+     "tlsopt4_32"}
+    {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" ""
+     "-a32" {tlsdll_32.s}
      {} "tlsdll32.so"}
     {"TLS32 opt 5" "-melf32ppc -shared --gc-sections --secure-plt tmpdir/tlsdll32.so" "" "-a32"  {tlsopt5_32.s}
      {{objdump -dr tlsopt5_32.d}}
-      "tlsopt5_32"}
+     "tlsopt5_32"}
     {"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s}
      {} "sdalib.so"}
     {"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s}
      {{objdump -R sdadyn.d}} "sdadyn"}
     {"relaxing" "-melf32ppc --relax -Ttext=0 --defsym far=0x80001234 --defsym near=0x00004320" "" "-a32" "relax.s"
      {{objdump -dr relax.d}}
-      "relax"}
+     "relax"}
     {"relocatable relaxing" "-melf32ppc -r --relax" "" "-a32" "relax.s"
      {{objdump -dr relaxr.d}}
-      "relax"}
+     "rrelax"}
 }
 
 set ppc64elftests {
+    {"TLS static exec (markers)" "-melf64ppc" ""
+     "-a64 --defsym TLSMARK=1"  {tls.s tlslib.s}
+     {{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
+     "tlsm"}
     {"TLS static exec" "-melf64ppc" "" "-a64"  {tls.s tlslib.s}
      {{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
-      "tls"}
+     "tls"}
     {"TLS helper shared library" "-shared -melf64ppc tmpdir/tlslib.o" "" "" {}
      {} "libtlslib.so"}
     {"TLS helper old shared lib" "-shared -melf64ppc" "" "-a64" {oldtlslib.s}
@@ -167,53 +177,53 @@ set ppc64elftests {
     {"TLS dynamic exec" "-melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
      {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
       {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
-      "tlsexe"}
+     "tlsexe"}
     {"TLS dynamic old" "-melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/liboldlib.so" "" "" {}
      {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
       {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
-      "tlsexeold"}
+     "tlsexeold"}
     {"TLS shared" "-shared -melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o" "" "" {}
      {{readelf -WSsrl tlsso.r} {objdump -dr tlsso.d}
       {objdump -sj.got tlsso.g} {objdump -sj.tdata tlsso.t}}
-      "tls.so"}
+     "tls.so"}
     {"TLSTOC static exec" "-melf64ppc tmpdir/tlslib.o " "" "-a64"  {tlstoc.s}
      {{objdump -dr tlstoc.d} {objdump -sj.got tlstoc.g}
       {objdump -sj.tdata tlstoc.t}}
-      "tlstoc"}
+     "tlstoc"}
     {"TLSTOC dynamic exec" "-melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
      "" {}
      {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
       {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
-      "tlsexetoc"}
+     "tlsexetoc"}
     {"TLSTOC dynamic old" "-melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/liboldlib.so" ""
      "" {}
      {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
       {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
-      "tlsexetocold"}
+     "tlsexetocold"}
     {"TLSTOC shared" "-shared -melf64ppc --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o" "" "" {}
      {{readelf -WSsrl tlstocso.r} {objdump -dr tlstocso.d}
       {objdump -sj.got tlstocso.g} {objdump -sj.tdata tlstocso.t}}
-      "tlstoc.so"}
+     "tlstoc.so"}
     {"TLS markers" "-melf64ppc" "" "-a64"  {tlsmark.s tlslib.s}
      {{objdump -dr tlsmark.d}}
-      "tlsmark"}
+     "tlsmark"}
     {"TLS opt 1" "-melf64ppc" "" "-a64"  {tlsopt1.s tlslib.s}
      {{objdump -dr tlsopt1.d}}
-      "tlsopt1"}
+     "tlsopt1"}
     {"TLS opt 2" "-melf64ppc" "" "-a64"  {tlsopt2.s tlslib.s}
      {{objdump -dr tlsopt2.d}}
-      "tlsopt2"}
+     "tlsopt2"}
     {"TLS opt 3" "-melf64ppc" "" "-a64"  {tlsopt3.s tlslib.s}
      {{objdump -dr tlsopt3.d}}
-      "tlsopt3"}
+     "tlsopt3"}
     {"TLS opt 4" "-melf64ppc" "" "-a64"  {tlsopt4.s tlslib.s}
      {{objdump -dr tlsopt4.d}}
-      "tlsopt4"}
+     "tlsopt4"}
     {"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s}
      {} "tlsdll.so"}
     {"TLS opt 5" "-melf64ppc -shared --gc-sections --no-plt-localentry tmpdir/tlsdll.so" "" "-a64"  {tlsopt5.s}
      {{objdump -dr tlsopt5.d} {readelf -wf tlsopt5.wf}}
-      "tlsopt5"}
+     "tlsopt5"}
     {"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
 	{{objdump -dj.data symtocbase.d}} "symtocbase.so"}
     {"TOC opt" "-melf64ppc" "" "-a64"  {tocopt.s}
diff --git a/ld/testsuite/ld-powerpc/tls.d b/ld/testsuite/ld-powerpc/tls.d
index 04b1ac83c33..563f6b21e66 100644
--- a/ld/testsuite/ld-powerpc/tls.d
+++ b/ld/testsuite/ld-powerpc/tls.d
@@ -10,44 +10,44 @@
 Disassembly of section \.text:
 
 0+100000e8 <\._start>:
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 90 78|78 90 63 38) 	addi    r3,r3,-28552
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(38 6d 90 78|78 90 6d 38) 	addi    r3,r13,-28552
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 90 40|40 90 63 38) 	addi    r3,r3,-28608
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(38 6d 90 40|40 90 6d 38) 	addi    r3,r13,-28608
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(39 23 80 48|48 80 23 39) 	addi    r9,r3,-32696
 .*:	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*:	(81 49 80 50|50 80 49 81) 	lwz     r10,-32688\(r9\)
 .*:	(e9 22 80 10|10 80 22 e9) 	ld      r9,-32752\(r2\)
 .*:	(7d 49 18 2a|2a 18 49 7d) 	ldx     r10,r9,r3
-.*:	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*:	(a1 49 90 60|60 90 49 a1) 	lhz     r10,-28576\(r9\)
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(a1 4d 90 60|60 90 4d a1) 	lhz     r10,-28576\(r13\)
 .*:	(89 4d 90 68|68 90 4d 89) 	lbz     r10,-28568\(r13\)
-.*:	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*:	(99 49 90 70|70 90 49 99) 	stb     r10,-28560\(r9\)
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(99 4d 90 70|70 90 4d 99) 	stb     r10,-28560\(r13\)
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(38 6d 90 00|00 90 6d 38) 	addi    r3,r13,-28672
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(f9 43 80 08|08 80 43 f9) 	std     r10,-32760\(r3\)
 .*:	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*:	(91 49 80 10|10 80 49 91) 	stw     r10,-32752\(r9\)
 .*:	(e9 22 80 08|08 80 22 e9) 	ld      r9,-32760\(r2\)
 .*:	(7d 49 19 2a|2a 19 49 7d) 	stdx    r10,r9,r3
-.*:	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*:	(b1 49 90 60|60 90 49 b1) 	sth     r10,-28576\(r9\)
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(b1 4d 90 60|60 90 4d b1) 	sth     r10,-28576\(r13\)
 .*:	(e9 4d 90 2a|2a 90 4d e9) 	lwa     r10,-28632\(r13\)
-.*:	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*:	(a9 49 90 30|30 90 49 a9) 	lha     r10,-28624\(r9\)
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(a9 4d 90 30|30 90 4d a9) 	lha     r10,-28624\(r13\)
 
 0+10000180 <\.__tls_get_addr>:
 .*:	(4e 80 00 20|20 00 80 4e) 	blr
diff --git a/ld/testsuite/ld-powerpc/tls.s b/ld/testsuite/ld-powerpc/tls.s
index 49828d0d27f..9bf69d35b35 100644
--- a/ld/testsuite/ld-powerpc/tls.s
+++ b/ld/testsuite/ld-powerpc/tls.s
@@ -29,23 +29,43 @@ _start:
 #extern syms
 #GD
  addi 3,2,gd@got@tlsgd		#R_PPC64_GOT_TLSGD16	gd
+ .ifdef TLSMARK
+ bl __tls_get_addr(gd@tlsgd)	#R_PPC64_TLSGD		gd
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
 #LD
  addi 3,2,ld@got@tlsld		#R_PPC64_GOT_TLSLD16	ld
+ .ifdef TLSMARK
+ bl __tls_get_addr(ld@tlsld)	#R_PPC64_TLSLD		ld
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
 #global syms
 #GD
  addi 3,2,gd0@got@tlsgd		#R_PPC64_GOT_TLSGD16	gd0
+ .ifdef TLSMARK
+ bl __tls_get_addr(gd0@tlsgd)	#R_PPC64_TLSGD		gd0
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
 #LD
  addi 3,2,ld0@got@tlsld		#R_PPC64_GOT_TLSLD16	ld0
+ .ifdef TLSMARK
+ bl __tls_get_addr(ld0@tlsld)	#R_PPC64_TLSLD		ld0
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
  addi 9,3,ld0@dtprel		#R_PPC64_DTPREL16	ld0
@@ -69,12 +89,22 @@ _start:
 #local syms
 #GD
  addi 3,2,gd4@got@tlsgd		#R_PPC64_GOT_TLSGD16	gd4
+ .ifdef TLSMARK
+ bl __tls_get_addr(gd4@tlsgd)	#R_PPC64_TLSGD		gd4
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
 #LD
  addi 3,2,ld4@got@tlsld		#R_PPC64_GOT_TLSLD16	ld4
+ .ifdef TLSMARK
+ bl __tls_get_addr(ld4@tlsld)	#R_PPC64_TLSLD		ld4
+				#R_PPC64_REL24		__tls_get_addr
+ .else
  bl .__tls_get_addr		#R_PPC64_REL24		.__tls_get_addr
+ .endif
  nop
 
  std 10,ld4@dtprel(3)		#R_PPC64_DTPREL16_DS	ld4
@@ -94,4 +124,3 @@ _start:
 
  addis 9,13,le5@tprel@ha	#R_PPC64_TPREL16_HA	le5
  lha 10,le5@tprel@l(9)		#R_PPC64_TPREL16_LO	le5
-
diff --git a/ld/testsuite/ld-powerpc/tls32.s b/ld/testsuite/ld-powerpc/tls32.s
index b9b84680b27..1c7a890402f 100644
--- a/ld/testsuite/ld-powerpc/tls32.s
+++ b/ld/testsuite/ld-powerpc/tls32.s
@@ -33,20 +33,40 @@ _start:
 #extern syms
 #GD
  addi 3,31,gd@got@tlsgd		#R_PPC_GOT_TLSGD16	gd
+ .ifdef TLSMARK
+ bl __tls_get_addr(gd@tlsgd)	#R_PPC_TLSGD		gd
+				#R_PPC_REL24		__tls_get_addr
+ .else
  bl __tls_get_addr		#R_PPC_REL24		__tls_get_addr
+ .endif
 
 #LD
  addi 3,31,ld@got@tlsld		#R_PPC_GOT_TLSLD16	ld
+ .ifdef TLSMARK
+ bl __tls_get_addr(ld@tlsld)	#R_PPC_TLSLD		ld
+				#R_PPC_REL24		__tls_get_addr
+ .else
  bl __tls_get_addr		#R_PPC_REL24		__tls_get_addr
+ .endif
 
 #global syms
 #GD
  addi 3,31,gd0@got@tlsgd	#R_PPC_GOT_TLSGD16	gd0
- bl __tls_get_addr+0x8000@plt	#R_PPC_PLTREL24		__tls_get_addr
+ .ifdef TLSMARK
+ bl __tls_get_addr+0x8000(gd0@tlsgd)@plt #R_PPC_TLSGD	gd0
+				#R_PPC_PLTREL24		__tls_get_addr+0x8000
+ .else
+ bl __tls_get_addr+0x8000@plt	#R_PPC_PLTREL24		__tls_get_addr+0x8000
+ .endif
 
 #LD
  addi 3,31,ld0@got@tlsld	#R_PPC_GOT_TLSLD16	ld0
- bl __tls_get_addr+0x8000@plt	#R_PPC_PLTREL24		__tls_get_addr
+ .ifdef TLSMARK
+ bl __tls_get_addr+0x8000(ld0@tlsld)@plt #R_PPC_TLSLD	ld0
+				#R_PPC_PLTREL24		__tls_get_addr+0x8000
+ .else
+ bl __tls_get_addr+0x8000@plt	#R_PPC_PLTREL24		__tls_get_addr+0x8000
+ .endif
 
  addi 9,3,ld0@dtprel		#R_PPC_DTPREL16		ld0
 
@@ -66,11 +86,21 @@ _start:
 #local syms, use a different got reg too.
 #GD
  addi 3,30,gd4@got@tlsgd	#R_PPC_GOT_TLSGD16	gd4
+ .ifdef TLSMARK
+ bl __tls_get_addr(gd4@tlsgd)	#R_PPC_TLSGD		gd4
+				#R_PPC_REL24		__tls_get_addr
+ .else
  bl __tls_get_addr		#R_PPC_REL24		__tls_get_addr
+ .endif
 
 #LD
  addi 3,30,ld4@got@tlsld	#R_PPC_GOT_TLSLD16	ld4
+ .ifdef TLSMARK
+ bl __tls_get_addr(ld4@tlsld)	#R_PPC_TLSLD		ld4
+				#R_PPC_REL24		__tls_get_addr
+ .else
  bl __tls_get_addr		#R_PPC_REL24		__tls_get_addr
+ .endif
 
  stw 10,ld4@dtprel(3)		#R_PPC_DTPREL16	ld4
 
diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d
index c423bbd2311..542b435847e 100644
--- a/ld/testsuite/ld-powerpc/tlsexe.d
+++ b/ld/testsuite/ld-powerpc/tlsexe.d
@@ -35,38 +35,38 @@ Disassembly of section \.text:
 .*	(38 62 80 18|18 80 62 38) 	addi    r3,r2,-32744
 .*	(4b ff ff a9|a9 ff ff 4b) 	bl      .*
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 90 38|38 90 63 38) 	addi    r3,r3,-28616
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(38 6d 90 38|38 90 6d 38) 	addi    r3,r13,-28616
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 40|40 80 23 39) 	addi    r9,r3,-32704
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 48|48 80 49 81) 	lwz     r10,-32696\(r9\)
 .*	(e9 22 80 28|28 80 22 e9) 	ld      r9,-32728\(r2\)
 .*	(7d 49 18 2a|2a 18 49 7d) 	ldx     r10,r9,r3
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(a1 49 90 58|58 90 49 a1) 	lhz     r10,-28584\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(a1 4d 90 58|58 90 4d a1) 	lhz     r10,-28584\(r13\)
 .*	(89 4d 90 60|60 90 4d 89) 	lbz     r10,-28576\(r13\)
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(99 49 90 68|68 90 49 99) 	stb     r10,-28568\(r9\)
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(99 4d 90 68|68 90 4d 99) 	stb     r10,-28568\(r13\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 90 00|00 90 6d 38) 	addi    r3,r13,-28672
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(f9 43 80 08|08 80 43 f9) 	std     r10,-32760\(r3\)
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(91 49 80 10|10 80 49 91) 	stw     r10,-32752\(r9\)
 .*	(e9 22 80 08|08 80 22 e9) 	ld      r9,-32760\(r2\)
 .*	(7d 49 19 2a|2a 19 49 7d) 	stdx    r10,r9,r3
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(b1 49 90 58|58 90 49 b1) 	sth     r10,-28584\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(b1 4d 90 58|58 90 4d b1) 	sth     r10,-28584\(r13\)
 .*	(e9 4d 90 2a|2a 90 4d e9) 	lwa     r10,-28632\(r13\)
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(a9 49 90 30|30 90 49 a9) 	lha     r10,-28624\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(a9 4d 90 30|30 90 4d a9) 	lha     r10,-28624\(r13\)
 .*	(00 00 00 00|20 02 01 00) .*
 .*	(00 01 02 20|00 00 00 00) .*
 .* <__glink_PLTresolve>:
diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index 5f2e8b4e44d..d216a2a3f94 100644
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -35,22 +35,22 @@ Disassembly of section \.text:
 .*	(38 62 80 18|18 80 62 38) 	addi    r3,r2,-32744
 .*	(4b ff ff a9|a9 ff ff 4b) 	bl      .*
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 90 38|38 90 63 38) 	addi    r3,r3,-28616
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(38 6d 90 38|38 90 6d 38) 	addi    r3,r13,-28616
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 40|40 80 23 39) 	addi    r9,r3,-32704
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 48|48 80 49 81) 	lwz     r10,-32696\(r9\)
 .*	(e9 22 80 48|48 80 22 e9) 	ld      r9,-32696\(r2\)
 .*	(7d 49 18 2a|2a 18 49 7d) 	ldx     r10,r9,r3
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(a1 49 90 58|58 90 49 a1) 	lhz     r10,-28584\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(a1 4d 90 58|58 90 4d a1) 	lhz     r10,-28584\(r13\)
 .*	(89 4d 90 60|60 90 4d 89) 	lbz     r10,-28576\(r13\)
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(99 49 90 68|68 90 49 99) 	stb     r10,-28568\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(99 4d 90 68|68 90 4d 99) 	stb     r10,-28568\(r13\)
 .*	(00 00 00 00|68 02 01 00) .*
 .*	(00 01 02 68|00 00 00 00) .*
 .* <__glink_PLTresolve>:
diff --git a/ld/testsuite/ld-powerpc/tlsld.d b/ld/testsuite/ld-powerpc/tlsld.d
index b34c01a9279..8eafc2edb89 100644
--- a/ld/testsuite/ld-powerpc/tlsld.d
+++ b/ld/testsuite/ld-powerpc/tlsld.d
@@ -10,32 +10,32 @@ Disassembly of section \.text:
 
 .*:
 .*	nop
-.*	addis   r29,r13,0
+.*	nop
 .*	mr      r3,r29
-.*	addi    r3,r3,4096
+.*	addi    r3,r13,4096
 .*	nop
 .*	addis   r3,r3,0
 .*	ld      r3,-32768\(r3\)
 .*	nop
-.*	addis   r29,r13,0
+.*	nop
 .*	mr      r3,r29
-.*	addi    r3,r3,4096
+.*	addi    r3,r13,4096
 .*	nop
 .*	ld      r3,-32768\(r3\)
 .*	nop
 .*	nop
 .*	nop
 .*	nop
-.*	addis   r29,r13,0
+.*	nop
 .*	mr      r3,r29
-.*	addi    r3,r3,-28672
+.*	addi    r3,r13,-28672
 .*	nop
 .*	ld      r3,0\(r3\)
 .*	nop
 .*	nop
-.*	addis   r29,r13,0
+.*	nop
 .*	mr      r3,r29
-.*	addi    r3,r3,-28672
+.*	addi    r3,r13,-28672
 .*	nop
 .*	ld      r3,0\(r3\)
 .*	nop
diff --git a/ld/testsuite/ld-powerpc/tlsmark.d b/ld/testsuite/ld-powerpc/tlsmark.d
index 720a31fd71b..7e10074ff1f 100644
--- a/ld/testsuite/ld-powerpc/tlsmark.d
+++ b/ld/testsuite/ld-powerpc/tlsmark.d
@@ -11,25 +11,25 @@ Disassembly of section \.text:
 
 0+100000e8 <_start>:
 .*:	(48 00 00 18|18 00 00 48) 	b       10000100 <_start\+0x18>
-.*:	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
+.*:	(38 6d 90 00|00 90 6d 38) 	addi    r3,r13,-28672
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 83 00 00|00 00 83 e8) 	ld      r4,0\(r3\)
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       10000108 <_start\+0x20>
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(4b ff ff e8|e8 ff ff 4b) 	b       100000ec <_start\+0x4>
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 83 80 00|00 80 83 e8) 	ld      r4,-32768\(r3\)
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       10000124 <_start\+0x3c>
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 14|14 00 00 48) 	b       10000134 <_start\+0x4c>
-.*:	(38 63 90 04|04 90 63 38) 	addi    r3,r3,-28668
+.*:	(38 6d 90 04|04 90 6d 38) 	addi    r3,r13,-28668
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 a3 00 00|00 00 a3 e8) 	ld      r5,0\(r3\)
 .*:	(4b ff ff ec|ec ff ff 4b) 	b       1000011c <_start\+0x34>
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 a3 80 04|04 80 a3 e8) 	ld      r5,-32764\(r3\)
 
diff --git a/ld/testsuite/ld-powerpc/tlsopt4.d b/ld/testsuite/ld-powerpc/tlsopt4.d
index a595fba9155..7c25655b57c 100644
--- a/ld/testsuite/ld-powerpc/tlsopt4.d
+++ b/ld/testsuite/ld-powerpc/tlsopt4.d
@@ -15,34 +15,34 @@ Disassembly of section \.text:
 Disassembly of section \.opt1:
 
 0+100000ec <\.opt1>:
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
 .*:	(41 82 00 10|10 00 82 41) 	beq     .*
-.*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(38 6d 90 10|10 90 6d 38) 	addi    r3,r13,-28656
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
-.*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(38 6d 90 10|10 90 6d 38) 	addi    r3,r13,-28656
 .*:	(60 00 00 00|00 00 00 60) 	nop
 
 Disassembly of section \.opt2:
 
 0+1000010c <\.opt2>:
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
 .*:	(41 82 00 08|08 00 82 41) 	beq     .*
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(38 6d 90 10|10 90 6d 38) 	addi    r3,r13,-28656
 .*:	(60 00 00 00|00 00 00 60) 	nop
 
 Disassembly of section \.opt3:
 
 0+10000124 <\.opt3>:
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 10|10 00 00 48) 	b       .*
-.*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(38 6d 90 10|10 90 6d 38) 	addi    r3,r13,-28656
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
-.*:	(38 63 90 08|08 90 63 38) 	addi    r3,r3,-28664
+.*:	(38 6d 90 08|08 90 6d 38) 	addi    r3,r13,-28664
 .*:	(60 00 00 00|00 00 00 60) 	nop
diff --git a/ld/testsuite/ld-powerpc/tlstoc.d b/ld/testsuite/ld-powerpc/tlstoc.d
index b852ddd25b1..657c93d4552 100644
--- a/ld/testsuite/ld-powerpc/tlstoc.d
+++ b/ld/testsuite/ld-powerpc/tlstoc.d
@@ -13,25 +13,25 @@ Disassembly of section \.text:
 .*	(4e 80 00 20|20 00 80 4e) 	blr
 
 .* <\._start>:
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 90 40|40 90 63 38) 	addi    r3,r3,-28608
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(38 6d 90 40|40 90 6d 38) 	addi    r3,r13,-28608
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 90 48|48 90 63 38) 	addi    r3,r3,-28600
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 90 48|48 90 6d 38) 	addi    r3,r13,-28600
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(38 6d 10 00|00 10 6d 38) 	addi    r3,r13,4096
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 50|50 80 23 39) 	addi    r9,r3,-32688
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 58|58 80 49 81) 	lwz     r10,-32680\(r9\)
 .*	(e9 22 80 40|40 80 22 e9) 	ld      r9,-32704\(r2\)
 .*	(7d 49 18 2a|2a 18 49 7d) 	ldx     r10,r9,r3
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(a1 49 90 68|68 90 49 a1) 	lhz     r10,-28568\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(a1 4d 90 68|68 90 4d a1) 	lhz     r10,-28568\(r13\)
 .*	(89 4d 90 70|70 90 4d 89) 	lbz     r10,-28560\(r13\)
-.*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
-.*	(99 49 90 78|78 90 49 99) 	stb     r10,-28552\(r9\)
+.*	(60 00 00 00|00 00 00 60) 	nop
+.*	(99 4d 90 78|78 90 4d 99) 	stb     r10,-28552\(r13\)