From: lkcl <lkcl@web>
Date: Mon, 5 Oct 2020 11:57:41 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2095
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9a8802ad8edd3e2f713e9ab28eab5965ca0a508d;p=libreriscv.git

---

diff --git a/lkcl.mdwn b/lkcl.mdwn
index 156dd22f7..6147b4200 100644
--- a/lkcl.mdwn
+++ b/lkcl.mdwn
@@ -41,6 +41,7 @@ move things along from one stage to the next
  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
    - EUR 250 (share with cole)
 
+
 ## Completed but not yet submitted:
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
@@ -60,6 +61,28 @@ move things along from one stage to the next
  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
    - EUR 100
 
+  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+     - with [[lkcl]]
+  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
+     - functions needed for simulator
+     - Shared 90% with [[lkcl]]
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
+     - Formal proof of decoder
+     - EUR 200
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
+     - POWER9 ALU proof
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
+     - POWER9 CR proof
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
+     - POWER9 BRANCH proof
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
+     - POWER9 LOGICAL proof
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
+    - POWER9 ROTATE proof
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
+    - MultiCompUnit (and Function Units) proof
+
 ## Submitted for NLNet RFP
 
 submitted but not confirmed paid: