From: Clifford Wolf Date: Mon, 28 May 2018 11:36:35 +0000 (+0200) Subject: Add comment to VIPER #13453 work-around X-Git-Tag: yosys-0.8~85 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9a946c207fd4f5e18ce464e39d7d180c29ce5c23;p=yosys.git Add comment to VIPER #13453 work-around Signed-off-by: Clifford Wolf --- diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 60fa6db3b..12f2fdd7f 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1395,6 +1395,7 @@ VerificClocking::VerificClocking(VerificImporter *importer, Net *net, bool sva_a return; } + // Use while() instead of if() to work around VIPER #13453 while (inst != nullptr && inst->Type() == PRIM_SVA_POSEDGE) { net = inst->GetInput();