From: Ali Saidi <saidi@eecs.umich.edu>
Date: Mon, 12 Mar 2007 17:56:09 +0000 (-0400)
Subject: move hver code to ua2005.cc
X-Git-Tag: m5_2.0_beta3~68^2~5^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9ad24e22481665ae626b0e4ed44e2eea91c1b553;p=gem5.git

move hver code to ua2005.cc

src/arch/sparc/miscregfile.cc:
    this code should be in readFSreg
src/arch/sparc/ua2005.cc:
    move code froh miscregfile to ua2005.cc

--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
---

diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index 20bc4ae5d..f3be1c4c2 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -231,14 +231,6 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg)
         return hintp;
       case MISCREG_HTBA:
         return htba;
-      case MISCREG_HVER:
-        // XXX set to match Legion
-        return ULL(0x3e) << 48 |
-               ULL(0x23) << 32 |
-               ULL(0x20) << 24 |
-                   //MaxGL << 16 | XXX For some reason legion doesn't set GL
-                   MaxTL << 8  |
-           (NWindows -1) << 0;
       case MISCREG_STRAND_STS_REG:
         return strandStatusReg;
       case MISCREG_HSTICK_CMPR:
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 439f38457..865280038 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -235,7 +235,13 @@ MiscRegFile::readFSReg(int miscReg, ThreadContext * tc)
       case MISCREG_HTBA:
         return readRegNoEffect(miscReg) & ULL(~0x7FFF);
       case MISCREG_HVER:
-        return NWindows | MaxTL << 8 | MaxGL << 16;
+        // XXX set to match Legion
+        return ULL(0x3e) << 48 |
+               ULL(0x23) << 32 |
+               ULL(0x20) << 24 |
+                   //MaxGL << 16 | XXX For some reason legion doesn't set GL
+                   MaxTL << 8  |
+           (NWindows -1) << 0;
 
       case MISCREG_STRAND_STS_REG:
         System *sys;