From: Florent Kermarrec Date: Thu, 6 Feb 2020 09:50:35 +0000 (+0100) Subject: cpu/vexriscv: update submodule X-Git-Tag: 24jan2021_ls180~689 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9b11e9192de3f2daa14c67ec446b3aa068860587;p=litex.git cpu/vexriscv: update submodule --- diff --git a/litex/soc/cores/cpu/vexriscv/verilog b/litex/soc/cores/cpu/vexriscv/verilog index 854f9bd2..8baad219 160000 --- a/litex/soc/cores/cpu/vexriscv/verilog +++ b/litex/soc/cores/cpu/vexriscv/verilog @@ -1 +1 @@ -Subproject commit 854f9bd2282c97251ce65e4117c5cf1630722004 +Subproject commit 8baad219885a47f65959a9cd4870691e84678db4