From: YRabbit <rabbit@yrabbit.cyou>
Date: Wed, 23 Feb 2022 06:11:47 +0000 (+1000)
Subject: gowin: Add support for true differential output
X-Git-Tag: yosys-0.15~11
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9b3cd4f0d81374a04393ef5d524a3c0603c1b27e;p=yosys.git

gowin: Add support for true differential output

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
---

diff --git a/techlibs/gowin/cells_sim.v b/techlibs/gowin/cells_sim.v
index cc2ad3df5..3f5340b11 100644
--- a/techlibs/gowin/cells_sim.v
+++ b/techlibs/gowin/cells_sim.v
@@ -570,12 +570,14 @@ module OBUF(output O, input I);
 	assign O = I;
 endmodule
 
+(* abc9_box *)
 module TBUF (O, I, OEN);
   input I, OEN;
   output O;
   assign O = OEN ? 1'bz : I;
 endmodule
 
+(* abc9_box *)
 module IOBUF (O, IO, I, OEN);
   input I,OEN;
   output O;
@@ -584,6 +586,15 @@ module IOBUF (O, IO, I, OEN);
   assign I = IO;
 endmodule
 
+(* abc9_box *)
+module TLVDS_OBUF (I, O, OB);
+  input I;
+  output O;
+  output OB;
+  assign O = I;
+  assign OB = ~I;
+endmodule
+
 module GSR (input GSRI);
 	wire GSRO = GSRI;
 endmodule