From: Yufeng Zhang <yufeng.zhang@arm.com>
Date: Mon, 15 Oct 2012 14:57:31 +0000 (+0000)
Subject: Added the changelog for the previous commit.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9b61754a3febc596d5fbe4b7b6ac073aa28dae9b;p=binutils-gdb.git

Added the changelog for the previous commit.
---

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2fa6b8d5bdf..ab713eded47 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+	* gas/aarch64/illegal-2.s: Add test case.
+	* gas/aarch64/illegal-2.l: Update.
+
 2012-10-14  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	* gas/hppa/basic/fmemLRbug.s: Remove double load and store instructions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index db6746af06a..ad5a070346f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+	* aarch64-opc.c (operand_general_constraint_met_p): Change to check
+	the alignment of addr.offset.imm instead of that of shifter.amount for
+	operand type AARCH64_OPND_ADDR_UIMM12.
+
 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	* arm-dis.c: Use preferred form of vrint instruction variants