From: Matthew Poremba Date: Thu, 9 Jul 2020 23:34:34 +0000 (-0700) Subject: arch-gcn3,gpu-compute: Fix GCN3 related compiler errors X-Git-Tag: v20.1.0.0~418 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9b95f32b1278257f0274ecf08a104ebaf8874c2c;p=gem5.git arch-gcn3,gpu-compute: Fix GCN3 related compiler errors Fix all errors that were revealed using the util/compiler-test.sh script. Change-Id: Ie0d35568624e5e1405143593f0677bbd0b066b61 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31154 Reviewed-by: Anthony Gutierrez Reviewed-by: Jason Lowe-Power Maintainer: Anthony Gutierrez Tested-by: kokoro --- diff --git a/src/arch/gcn3/insts/instructions.cc b/src/arch/gcn3/insts/instructions.cc index 7c2cf0e49..426f99161 100644 --- a/src/arch/gcn3/insts/instructions.cc +++ b/src/arch/gcn3/insts/instructions.cc @@ -5183,7 +5183,7 @@ namespace Gcn3ISA void Inst_SMEM__S_STORE_DWORDX4::initiateAcc(GPUDynInstPtr gpuDynInst) { - ConstScalarOperandU64 sdata(gpuDynInst, instData.SDATA); + ConstScalarOperandU128 sdata(gpuDynInst, instData.SDATA); sdata.read(); std::memcpy((void*)gpuDynInst->scalar_data, sdata.rawDataPtr(), 4 * sizeof(ScalarRegU32)); diff --git a/src/arch/gcn3/insts/op_encodings.cc b/src/arch/gcn3/insts/op_encodings.cc index 997b22f22..86d2a9b2d 100644 --- a/src/arch/gcn3/insts/op_encodings.cc +++ b/src/arch/gcn3/insts/op_encodings.cc @@ -1887,12 +1887,14 @@ namespace Gcn3ISA } else if (numDstRegOperands()) { return extData.VDST; } + break; case 2: if (numSrcRegOperands() > 2) { return extData.DATA1; } else if (numDstRegOperands()) { return extData.VDST; } + break; case 3: assert(numDstRegOperands()); return extData.VDST; @@ -1900,6 +1902,8 @@ namespace Gcn3ISA fatal("Operand at idx %i does not exist\n", opIdx); return -1; } + fatal("Operand at idx %i does not exist\n", opIdx); + return -1; } // --- Inst_MUBUF base class methods --- diff --git a/src/arch/gcn3/operand.hh b/src/arch/gcn3/operand.hh index 97c6310d3..0a1f656df 100644 --- a/src/arch/gcn3/operand.hh +++ b/src/arch/gcn3/operand.hh @@ -521,12 +521,22 @@ namespace Gcn3ISA switch(_opIdx) { case REG_EXEC_LO: { - ScalarRegU64 exec_mask = _gpuDynInst->wavefront()-> - execMask().to_ullong(); - std::memcpy((void*)srfData.data(), (void*)&exec_mask, - sizeof(srfData)); - DPRINTF(GPUSRF, "Read EXEC\n"); - DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask); + if (NumDwords == 1) { + ScalarRegU32 exec_mask = _gpuDynInst->wavefront()-> + execMask().to_ulong(); + std::memcpy((void*)srfData.data(), (void*)&exec_mask, + sizeof(exec_mask)); + DPRINTF(GPUSRF, "Read EXEC\n"); + DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask); + } else { + assert(NumDwords == 2); + ScalarRegU64 exec_mask = _gpuDynInst->wavefront()-> + execMask().to_ullong(); + std::memcpy((void*)srfData.data(), (void*)&exec_mask, + sizeof(exec_mask)); + DPRINTF(GPUSRF, "Read EXEC\n"); + DPRINTF(GPUSRF, "EXEC = %#x\n", exec_mask); + } } break; case REG_EXEC_HI: @@ -541,7 +551,7 @@ namespace Gcn3ISA ScalarRegU32 exec_mask_hi = bits(exec_mask, 63, 32); std::memcpy((void*)srfData.data(), (void*)&exec_mask_hi, - sizeof(srfData)); + sizeof(exec_mask_hi)); DPRINTF(GPUSRF, "Read EXEC_HI\n"); DPRINTF(GPUSRF, "EXEC_HI = %#x\n", exec_mask_hi); } @@ -556,7 +566,7 @@ namespace Gcn3ISA { typename OpTraits::FloatT pos_half = 0.5; std::memcpy((void*)srfData.data(), (void*)&pos_half, - sizeof(srfData)); + sizeof(pos_half)); } break; @@ -564,44 +574,44 @@ namespace Gcn3ISA { typename OpTraits::FloatT neg_half = -0.5; std::memcpy((void*)srfData.data(), (void*)&neg_half, - sizeof(srfData)); + sizeof(neg_half)); } break; case REG_POS_ONE: { typename OpTraits::FloatT pos_one = 1.0; - std::memcpy(srfData.data(), &pos_one, sizeof(srfData)); + std::memcpy(srfData.data(), &pos_one, sizeof(pos_one)); } break; case REG_NEG_ONE: { typename OpTraits::FloatT neg_one = -1.0; - std::memcpy(srfData.data(), &neg_one, sizeof(srfData)); + std::memcpy(srfData.data(), &neg_one, sizeof(neg_one)); } break; case REG_POS_TWO: { typename OpTraits::FloatT pos_two = 2.0; - std::memcpy(srfData.data(), &pos_two, sizeof(srfData)); + std::memcpy(srfData.data(), &pos_two, sizeof(pos_two)); } break; case REG_NEG_TWO: { typename OpTraits::FloatT neg_two = -2.0; - std::memcpy(srfData.data(), &neg_two, sizeof(srfData)); + std::memcpy(srfData.data(), &neg_two, sizeof(neg_two)); } break; case REG_POS_FOUR: { typename OpTraits::FloatT pos_four = 4.0; - std::memcpy(srfData.data(), &pos_four, sizeof(srfData)); + std::memcpy(srfData.data(), &pos_four, sizeof(pos_four)); } break; case REG_NEG_FOUR: { typename OpTraits::FloatT neg_four = -4.0; std::memcpy((void*)srfData.data(), (void*)&neg_four , - sizeof(srfData)); + sizeof(neg_four)); } break; case REG_PI: @@ -614,10 +624,10 @@ namespace Gcn3ISA if (sizeof(DataType) == sizeof(ScalarRegF64)) { std::memcpy((void*)srfData.data(), - (void*)&pi_u64, sizeof(srfData)); + (void*)&pi_u64, sizeof(pi_u64)); } else { std::memcpy((void*)srfData.data(), - (void*)&pi_u32, sizeof(srfData)); + (void*)&pi_u32, sizeof(pi_u32)); } } break; diff --git a/src/gpu-compute/gpu_compute_driver.cc b/src/gpu-compute/gpu_compute_driver.cc index 287c2a19a..6bdb3140e 100644 --- a/src/gpu-compute/gpu_compute_driver.cc +++ b/src/gpu-compute/gpu_compute_driver.cc @@ -267,6 +267,7 @@ GPUComputeDriver::ioctl(ThreadContext *tc, unsigned req, Addr ioc_buf) { warn("unimplemented ioctl: AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU\n"); } + break; case AMDKFD_IOC_ALLOC_MEMORY_OF_SCRATCH: { warn("unimplemented ioctl: AMDKFD_IOC_ALLOC_MEMORY_OF_SCRATCH\n");