From: Tim Newsome <tim@sifive.com>
Date: Tue, 14 Jun 2016 20:34:54 +0000 (-0700)
Subject: Make gdbserver code work with small Debug RAM.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9b960e91b4d7e44d59fd73a7199517a82ba07c86;p=riscv-isa-sim.git

Make gdbserver code work with small Debug RAM.
---

diff --git a/riscv/gdbserver.cc b/riscv/gdbserver.cc
index b8de17e..140cdd5 100644
--- a/riscv/gdbserver.cc
+++ b/riscv/gdbserver.cc
@@ -529,6 +529,7 @@ class general_registers_read_op_t : public operation_t
 
     bool perform_step(unsigned int step)
     {
+      D(fprintf(stderr, "register_read step %d\n", step));
       if (step == 0) {
         gs.start_packet();
 
@@ -571,7 +572,9 @@ class general_registers_read_op_t : public operation_t
       if (current_reg + 1 == S0) {
         gs.dr_write32(i++, csrr(S0, CSR_DSCRATCH));
       }
-      gs.dr_write_store(i++, current_reg+1, SLOT_DATA1);
+      if (step < 15) {
+        gs.dr_write_store(i++, current_reg+1, SLOT_DATA1);
+      }
       gs.dr_write_jump(i);
       gs.set_interrupt(0);
 
@@ -784,6 +787,22 @@ class memory_write_op_t : public operation_t
     bool perform_step(unsigned int step)
     {
       reg_t paddr = gs.translate(vaddr);
+
+      unsigned int data_offset;
+      switch (gs.xlen) {
+        case 32:
+          data_offset = slot_offset32[SLOT_DATA1];
+          break;
+        case 64:
+          data_offset = slot_offset64[SLOT_DATA1];
+          break;
+        case 128:
+          data_offset = slot_offset128[SLOT_DATA1];
+          break;
+        default:
+          abort();
+      }
+
       if (step == 0) {
         access_size = gs.find_access_size(paddr, length);
 
@@ -798,27 +817,27 @@ class memory_write_op_t : public operation_t
         gs.dr_write_load(0, S0, SLOT_DATA0);
         switch (access_size) {
           case 1:
-            gs.dr_write32(1, lb(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+            gs.dr_write32(1, lb(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
             gs.dr_write32(2, sb(S1, S0, 0));
-            gs.dr_write32(6, data[0]);
+            gs.dr_write32(data_offset, data[0]);
             break;
           case 2:
-            gs.dr_write32(1, lh(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+            gs.dr_write32(1, lh(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
             gs.dr_write32(2, sh(S1, S0, 0));
-            gs.dr_write32(6, data[0] | (data[1] << 8));
+            gs.dr_write32(data_offset, data[0] | (data[1] << 8));
             break;
           case 4:
-            gs.dr_write32(1, lw(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+            gs.dr_write32(1, lw(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
             gs.dr_write32(2, sw(S1, S0, 0));
-            gs.dr_write32(6, data[0] | (data[1] << 8) |
+            gs.dr_write32(data_offset, data[0] | (data[1] << 8) |
                 (data[2] << 16) | (data[3] << 24));
             break;
           case 8:
-            gs.dr_write32(1, ld(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+            gs.dr_write32(1, ld(S1, 0, (uint16_t) DEBUG_RAM_START + 4*data_offset));
             gs.dr_write32(2, sd(S1, S0, 0));
-            gs.dr_write32(6, data[0] | (data[1] << 8) |
+            gs.dr_write32(data_offset, data[0] | (data[1] << 8) |
                 (data[2] << 16) | (data[3] << 24));
-            gs.dr_write32(7, data[4] | (data[5] << 8) |
+            gs.dr_write32(data_offset+1, data[4] | (data[5] << 8) |
                 (data[6] << 16) | (data[7] << 24));
             break;
           default:
@@ -847,19 +866,19 @@ class memory_write_op_t : public operation_t
         const unsigned char *d = data + offset;
         switch (access_size) {
           case 1:
-            gs.dr_write32(6, d[0]);
+            gs.dr_write32(data_offset, d[0]);
             break;
           case 2:
-            gs.dr_write32(6, d[0] | (d[1] << 8));
+            gs.dr_write32(data_offset, d[0] | (d[1] << 8));
             break;
           case 4:
-            gs.dr_write32(6, d[0] | (d[1] << 8) |
+            gs.dr_write32(data_offset, d[0] | (d[1] << 8) |
                 (d[2] << 16) | (d[3] << 24));
             break;
           case 8:
-            gs.dr_write32(6, d[0] | (d[1] << 8) |
+            gs.dr_write32(data_offset, d[0] | (d[1] << 8) |
                 (d[2] << 16) | (d[3] << 24));
-            gs.dr_write32(7, d[4] | (d[5] << 8) |
+            gs.dr_write32(data_offset+1, d[4] | (d[5] << 8) |
                 (d[6] << 16) | (d[7] << 24));
             break;
           default:
diff --git a/riscv/gdbserver.h b/riscv/gdbserver.h
index 8ff3a76..c45f184 100644
--- a/riscv/gdbserver.h
+++ b/riscv/gdbserver.h
@@ -107,11 +107,9 @@ enum slot {
   SLOT_DATA_LAST,
 };
 
-// We know that this code just talks to a simulator with 64 bytes of debug RAM,
-// so can hardcode the offset to the last word.
-static const unsigned int slot_offset32[] = {0, 4, 5, 15};
-static const unsigned int slot_offset64[] = {0, 4, 6, 14};
-static const unsigned int slot_offset128[] = {0, 4, 8, 12};
+static const unsigned int slot_offset32[] = {0, 4, 5, DEBUG_RAM_SIZE/4 - 1};
+static const unsigned int slot_offset64[] = {0, 4, 6, DEBUG_RAM_SIZE/4 - 2};
+static const unsigned int slot_offset128[] = {0, 4, 8, DEBUG_RAM_SIZE/4 - 4};
 
 class gdbserver_t
 {