From: Thomas Preud'homme Date: Tue, 6 Jun 2017 12:58:02 +0000 (+0000) Subject: [ARM] Rename *_compute_save_reg_mask () X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9bd01837e4c9f8f4e005a95a59f0147a6bb1d7c7;p=gcc.git [ARM] Rename *_compute_save_reg_mask () 2017-06-06 Thomas Preud'homme gcc/ * config/arm/arm.c (arm_compute_save_reg_mask): Rename into ... (arm_compute_save_core_reg_mask): This. (thumb1_compute_save_reg_mask): Rename into ... (thumb1_compute_save_core_reg_mask): This. (arm_compute_save_reg0_reg12_mask): Adapt comment. (arm_compute_frame_layout): Likewise. From-SVN: r248920 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 38d552433c3..ad09804a1d0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-06-06 Thomas Preud'homme + + * config/arm/arm.c (arm_compute_save_reg_mask): Rename into ... + (arm_compute_save_core_reg_mask): This. + (thumb1_compute_save_reg_mask): Rename into ... + (thumb1_compute_save_core_reg_mask): This. + (arm_compute_save_reg0_reg12_mask): Adapt comment. + (arm_compute_frame_layout): Likewise. + 2017-06-06 Richard Biener PR tree-optimization/80974 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 0c2fbd91fc2..42b0e867a18 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -130,7 +130,7 @@ static void push_minipool_fix (rtx_insn *, HOST_WIDE_INT, rtx *, static void arm_reorg (void); static void note_invalid_constants (rtx_insn *, HOST_WIDE_INT, int); static unsigned long arm_compute_save_reg0_reg12_mask (void); -static unsigned long arm_compute_save_reg_mask (void); +static unsigned long arm_compute_save_core_reg_mask (void); static unsigned long arm_isr_value (tree); static unsigned long arm_compute_func_type (void); static tree arm_handle_fndecl_attribute (tree *, tree, tree, int, bool *); @@ -19018,7 +19018,7 @@ output_ascii_pseudo_op (FILE *stream, const unsigned char *p, int len) && reg >= FIRST_HI_REGNUM && reg <= LAST_HI_REGNUM)) /* Compute the register save mask for registers 0 through 12 - inclusive. This code is used by arm_compute_save_reg_mask. */ + inclusive. This code is used by arm_compute_save_core_reg_mask (). */ static unsigned long arm_compute_save_reg0_reg12_mask (void) @@ -19145,12 +19145,12 @@ arm_compute_static_chain_stack_bytes (void) return 0; } -/* Compute a bit mask of which registers need to be +/* Compute a bit mask of which core registers need to be saved on the stack for the current function. This is used by arm_compute_frame_layout, which may add extra registers. */ static unsigned long -arm_compute_save_reg_mask (void) +arm_compute_save_core_reg_mask (void) { unsigned int save_reg_mask = 0; unsigned long func_type = arm_current_func_type (); @@ -19232,10 +19232,10 @@ arm_compute_save_reg_mask (void) return save_reg_mask; } -/* Compute a bit mask of which registers need to be +/* Compute a bit mask of which core registers need to be saved on the stack for the current function. */ static unsigned long -thumb1_compute_save_reg_mask (void) +thumb1_compute_save_core_reg_mask (void) { unsigned long mask; unsigned reg; @@ -20771,7 +20771,7 @@ any_sibcall_could_use_r3 (void) eliminating some of the registers. The values returned by this function must reflect the behavior - of arm_expand_prologue() and arm_compute_save_reg_mask(). + of arm_expand_prologue () and arm_compute_save_core_reg_mask (). The sign of the number returned reflects the direction of stack growth, so the values are positive for all eliminations except @@ -20827,7 +20827,7 @@ arm_compute_frame_layout (void) { unsigned int regno; - offsets->saved_regs_mask = arm_compute_save_reg_mask (); + offsets->saved_regs_mask = arm_compute_save_core_reg_mask (); core_saved = bit_count (offsets->saved_regs_mask) * 4; saved = core_saved; @@ -20853,7 +20853,7 @@ arm_compute_frame_layout (void) } else /* TARGET_THUMB1 */ { - offsets->saved_regs_mask = thumb1_compute_save_reg_mask (); + offsets->saved_regs_mask = thumb1_compute_save_core_reg_mask (); core_saved = bit_count (offsets->saved_regs_mask) * 4; saved = core_saved; if (TARGET_BACKTRACE)