From: Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Date: Sat, 11 Sep 2010 04:13:55 +0000 (-0700)
Subject: [sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bit
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9bd1c58531611e26a446abe31b6cece7e8ed5e16;p=riscv-isa-sim.git

[sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bit
---

diff --git a/riscv/execute.h b/riscv/execute.h
index 554962d..9a50b99 100644
--- a/riscv/execute.h
+++ b/riscv/execute.h
@@ -336,14 +336,14 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/mff_d.h"
           break;
         }
-        if((insn.bits & 0xfe0fffe0) == 0xd4006c00)
+        if((insn.bits & 0xfe0fffe0) == 0xd4006400)
         {
-          #include "insns/mtfh_d.h"
+          #include "insns/mffh_d.h"
           break;
         }
-        if((insn.bits & 0xfe0fffe0) == 0xd4006400)
+        if((insn.bits & 0xfe007fe0) == 0xd4006c00)
         {
-          #include "insns/mffh_d.h"
+          #include "insns/mtflh_d.h"
           break;
         }
         if((insn.bits & 0xfe0fffe0) == 0xd4006800)
diff --git a/riscv/insns/mffh_d.h b/riscv/insns/mffh_d.h
index e69de29..b466f60 100644
--- a/riscv/insns/mffh_d.h
+++ b/riscv/insns/mffh_d.h
@@ -0,0 +1,2 @@
+require_fp;
+RC = sext32(FRA >> 32);
diff --git a/riscv/insns/mtf_s.h b/riscv/insns/mtf_s.h
index 239df16..723a2f7 100644
--- a/riscv/insns/mtf_s.h
+++ b/riscv/insns/mtf_s.h
@@ -1,2 +1,2 @@
 require_fp;
-FRC = sext32(RA);
+FRC = RA;
diff --git a/riscv/insns/mtflh_d.h b/riscv/insns/mtflh_d.h
new file mode 100644
index 0000000..4e33f39
--- /dev/null
+++ b/riscv/insns/mtflh_d.h
@@ -0,0 +1,2 @@
+require_fp;
+FRC = (RA & 0x00000000FFFFFFFF) | (RB << 32);