From: Jacob Lifshay Date: Tue, 30 Aug 2022 07:32:21 +0000 (-0700) Subject: make sv.instr use CUSTOM_INSNS by default for assembling instr X-Git-Tag: sv_maxu_works-initial~4 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9be3b61b6a3037fdcf087f692e9145678e571a35;p=openpower-isa.git make sv.instr use CUSTOM_INSNS by default for assembling instr --- diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index ad8a0f62..53bc7728 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1290,8 +1290,26 @@ class SVP64Asm: rc = '.' if rc_mode else '' yield ".long 0x%08x" % int(svp64_prefix) log(v30b_op, v30b_newfields) + + v30b_op_rc = v30b_op + if not v30b_op.endswith('.'): + v30b_op_rc += rc + + # svstep is weird + # FIXME(lkcl): should sv.svstep be like svstep? + if v30b_op_rc in ("svstep", "svstep."): + # compensate for `SVi -= 1` in svstep() + v30b_newfields[1] = str(int(v30b_newfields[1]) + 1) + + custom_insn_hook = CUSTOM_INSNS.get(v30b_op_rc) + if custom_insn_hook is not None: + fields = tuple(map(to_number, v30b_newfields)) + insn_num = custom_insn_hook(fields) + log(opcode, bin(insn_num)) + yield ".long 0x%X # %s" % (insn_num, insn) + return # argh, sv.fmadds etc. need to be done manually - if v30b_op == 'ffmadds': + elif v30b_op == 'ffmadds': opcode = 59 << (32-6) # bits 0..6 (MSB0) opcode |= int(v30b_newfields[0]) << (32-11) # FRT opcode |= int(v30b_newfields[1]) << (32-16) # FRA